412:
extremely slow. To address this, eight additional registers were added in a new "bank 1", the original sixteen registers retroactively becoming "bank 0". The idea was that programmers would attempt to place their critical data in the first eight registers of bank 0. When an interrupt was received, the handler code would call an instruction to swap banks, which would cause bank 1's registers to override bank 0's registers 0 through 7. The handler code would then use these eight registers for any local data, leaving the original values untouched. When the handler completed, it simply swapped bank 0 back in. This reduced the switching time to a single instruction, greatly improving interrupt response times.
978:
9 cycles per pair plus 7 for setup and any necessary post-processing, or 8 per pair plus 15 extra (...etc). The actual instruction mix wasn't specified, so without both source code and a list of instruction execution times it's impossible to be sure. A more efficient addition routine might have been possible on the 4040 vs the 4004, but the extra instructions don't suggest any obvious method for achieving this and appear to be focussed on addressing the earlier chip's more obvious shortcomings, e.g. a lack of interrupts and haltability.
376:
330:, not RAM. Although one could implement the "ROM space" using RAM chips, there were no instructions able to write to that area of memory, and no instructions able to read program code from RAM space. The idea was that systems would supply the system program on ROM, and small amounts of RAM would be used only for data, if at all. In typical use, the internal "index registers" would be used for storage during calculations, with the 16 4-bit registers able to hold a single 8-digit
368:
1011:
regular 4001 ROM to the processor regardless of what's connected on the other side; furthering the illusion, it also provides the same four I/O lines that a 4001 would offer). A 4040 making use of two 4289s could offer various combinations of ROM and RAM in 2KB segments up to 8KB total with a relatively simplistic segregated addressing scheme and a small number of 4101s and 4308s, e.g. 3x 4308 and 8x 4101 for 6KB ROM and 1KB RAM.
299:
291:
29:
967:
This may not be entirely accurate and is based on the 4004 characteristics; some of the added instructions may require additional cycles to execute, especially any external register stacking required for interrupt handling, but it is not made clear in the documentation as to whether this is the case;
977:
Likewise, based on claimed 4004 performance; "850 μs" is a somewhat rounded-off figure claimed in an early Intel brochure and may not be particularly precise, but the total execution time works out to approximately 79 or 80 machine cycles, which fits neatly with either 10 cycles per digit pair,
872:
4265 - Programmable general-purpose I/O. It contains four 4-bit I/O ports. It has 14 software-selectable modes that can be programmed to interface with these ports. Not only this can interface with this processor and 8080A processor as well. It was available in sample quantities in stock in March
1000:
storage of four 4002s into a single individually-selectable chip, but with neither the 4-bit I/O port nor additional 64 words of I/O-command-accessed "status" memory. As it has a dedicated, 8-bit address bus, and two separate 4-bit data input and output buses, the 4101 is intended only for use as a
1010:
Allows connection of "standard" memory (8-bit parallel data and/or up to 12-bit parallel addressing, the latter in the form of 8-bit address plus 4-bit binary chip select) and devices to the 4004 or 4040, as well as the use of RAM as
Program Memory (the 4289 can be installed so as to appear like a
423:
by allowing the processor to be single-stepped. When the processor was in stopped mode, most of the chip hardware put into a low-drain, high-impedance condition, reducing power use. The machine cycle clocks were kept running for the benefit of external devices, including any interrupt controllers
405:, a serious limitation. The 4040 added a new input pin for calling an interrupt, as well an output pin to indicate the interrupt signal had been noticed and was being acted on. As interrupts also need to save a return address, the stack register file was expanded to seven entries, up from three.
1030:
Intended for use downstream of a 4289, as it presents an 11-bit parallel address input bus and separate 8-bit parallel data output bus, as well as three binary-coded chip select lines (thus allowing provision of up to 16KB ROM with an addressing scheme incompatible with the 4004/4040 on several
411:
code normally starts by saving out values in the registers to allow the interrupt code to use them, and then at the end it copies the values back from memory so that the processor returns to its original pre-interrupt state. With the multi-cycle memory access of the design, this would have been
957:
by default only one level of interrupt was supported, as further servicing was disabled once an initial interrupt was acknowledged and could only re-enabled on RTI, essentially allowing three levels of subroutine stacking within an interrupt itself occurring within a three-deep subroutine, but
811:
Address bus: 12-bit for ROM (multiplexed onto data bus; addresses took three bus cycles to transmit, same as in the 4004), effectively 13-bit with use of bank-switching commands; effectively 10-bit or 8-bit for RAM (8-bit direct address plus one-of-four, i.e. 2-bit equivalent, bank select; the
353:
for both data and addresses. Additional pins indicated whether the address was in ROM or one of several "banks" of RAM. As addresses were 12 bits long, expressing an address took three cycles along with the subsequent read or write, and external circuitry had to
264:, which were lacking in the 4004 and considered a major oversight. Two more implemented a halt/stop system, which put the processor into a low-power mode and also allowed for single-step operation that made debugging much easier. Another pin was used to
884:
buffer prior servicing the CPU. It can be interfaced with sensors, panel switches and keyboards which it supports full teletypewriter size. That can be key input encoding, polling, character input buffer storage, and keyboard over-entry
818:
Operating frequency: 500 to 740 kHz main clock (2-phase, overlapping); 62500 to 92500 8-clock machine cycles per second, each instruction requiring either one or two machine cycles to read and execute, meaning a rough average of
389:
The 4004 had a single ROM pin, whereas the 4040 added another ROM pin to allow two banks of ROM. This effectively increased the ROM address from 12 to 13 bits, or 8 kB. Unlike later designs where the two lines could be
358:
each 4 bit part of the address between cycles. Instructions were 8 bits, so loading the next instruction required many cycles, which led to the slow performance in spite of what was a relatively fast cycle time for the era.
1020:
Directly replaces four separate 4001s with a single chip, including being available in four "metal" variants that respond to logical chip addresses 0-3, 4-7, 8-11 and 12-15, simulating the sixteen original versions of the
876:
4269 - Programmable keyboard/display. It has system software configuration in this chipset via instructions that controls how these ports can be handled. It was available in sample quantities in March (1976).
968:
halt/step are special cases which naturally take potentially many millions of cycles to "execute", but as these essentially occur "outside" of the usual program flow, they don't count for speed calculation.
987:
Provides "high" current (~25mA) handling capacity for external I/O devices. Allegedly intended solely for use with the 4289, but design appears fairly generic and may be adaptable to a bare 4004/4040?
826:
Performance: Claimed execution time of ~850 μs to add two 32-bit (8-digit BCD) numbers, or around 1175 such operations per second and about 10 machine cycles per digit pair.
1001:
downstream peripheral of the 4289. This is further emphasised by the SRAM's claim to be "used for writeable
Program Memory", something not achievable by a bare 4004 or 4040.
1106:
Intel
Corporation, "4269 and 4265 Programmable I/O Components Introduced for Intel MCS-40 4-bit Systems", Intel Microcomputer News, Volume 3, No. 1, January 1976, page 3
1044:
i.e. UV-erased rather than electronically, and is again intended for use with the 4289, as it has separate, 8-bit parallel, address input and data output buses
415:
Another addition was the input stop pin, and the associated output stop acknowledge. These could be used to stop the processor while the system performed
2196:
2013:
888:
Display
Features: It operates and refresh displays or indicator arrays up to 128 elements or lights. It also supports gas-discharge display such as
2201:
2392:
2299:
2211:
2216:
2206:
2191:
2018:
2008:
386:
The 4040 was essentially an expansion of the 4004, with additional pins, more registers and new instructions to take advantage of both.
1221:
2244:
2304:
326:
and many of its design notes are related to this role. For instance, program code can only be read from an area dedicated to
812:
additional 256 "status" memory locations required use of I/O commands to read or write, from an overall 8-bit address space)
1365:
1350:
1274:
1264:
1169:
334:
value, the data format used by calculators. It also had four 12-bit registers for holding addresses, the top-most was the
1269:
1289:
1284:
1279:
2063:
1920:
2254:
2234:
1497:
1343:
1321:
1316:
1311:
1306:
1259:
1254:
1129:
1116:
881:
427:
To take advantage of these new features, the instruction set added 14 new instructions, bringing the total to 60.
2179:
1326:
1301:
2387:
2382:
1492:
1461:
1432:
1214:
1564:
1473:
1333:
1296:
1249:
2361:
1535:
1485:
1449:
128:
1559:
1530:
1522:
1480:
1468:
1444:
1338:
1437:
838:
proposed the project, formulated the architecture and led the design. The detailed design was done by
2314:
1207:
394:
encoded and thus support four banks, the ROM chips used with the 4004 and 4040 used these lines like
880:
Keyboard
Features: It generates an interrupt when the key is pressed. It stores up to 8 characters
2092:
1244:
1230:
2356:
2331:
1925:
938:
820:
355:
246:
82:
279:
was expanded, increasing it to 60 instructions from the original 46. Additionally, the internal
2346:
1402:
1392:
1387:
1355:
1086:
1143:
2336:
2058:
323:
253:
1668:
331:
173:
137:
1938:
1031:
different levels - although only two 4316s, thus 4KB of ROM, or one 4316 plus RAM, can be
8:
2294:
1784:
257:
2341:
2174:
2169:
1956:
1640:
1635:
1630:
1625:
1620:
2164:
2159:
2154:
2149:
2144:
2139:
2134:
2129:
2124:
1035:
addressed by a 4289 without additional hardware and/or special programming techniques)
2107:
1991:
1961:
1164:
408:
424:
needed to wake the chip back up, which relied on these controllers staying in sync.
272:(ROM), doubling the amount of ROM the processor could address compared to the 4004.
2102:
2080:
2044:
1842:
1736:
1591:
1423:
1378:
860:
4201 – Clock
Generator, 500 to 740 kHz, using 4.000 to 5.185 MHz crystals
327:
269:
242:
150:
260:, giving it 8 more pins than the 16-pin 4004. Two of these were used to implement
256:(ALU) were identical to the 4004. The main improvement was to use a larger 24-pin
230:
121:
1699:
1672:
1184:
1065:
917:
835:
806:
335:
276:
218:
133:
116:
2239:
1903:
339:
265:
2075:
1943:
375:
2376:
1866:
1856:
1815:
1552:
1179:
926:
391:
280:
1189:
2119:
1805:
1456:
416:
349:
To reduce pin count to only 16, the original 4004 had only four data pins,
234:
371:
i4040 microarchitecture. Note: the "data bus" is also used for addressing.
2025:
1976:
1966:
1861:
1828:
1823:
1810:
1769:
1763:
1757:
1509:
1504:
921:
magazine, the first microcomputer designed around the Intel 4040 was the
395:
350:
2264:
2259:
2114:
2053:
1998:
1971:
1915:
1796:
1751:
1745:
1720:
1714:
1708:
1681:
1615:
1600:
1540:
1174:
855:
546:
343:
317:
284:
238:
226:
191:
85:
2324:
2309:
2269:
2097:
1986:
1981:
1888:
1883:
1397:
922:
889:
839:
420:
402:
261:
2319:
1898:
1547:
1409:
1199:
1194:
1115:
Intel
Corporation, "4265 Programmable General Purpose I/O Device",
367:
2351:
2249:
2087:
2070:
2030:
1951:
1932:
1910:
1610:
1605:
1128:
Intel
Corporation, "4269 Programmable Keyboard Display Device",
1102:
1100:
2274:
2040:
1893:
1878:
1587:
1419:
380:
298:
290:
28:
1838:
1374:
1097:
222:
66:
1150:(4). Byte Publications: 89 – via the Internet Archive.
2186:
2003:
1873:
1851:
1647:
398:
pins, and thus the two lines could only support two banks.
958:
detection could be forced back on with a specific command.
1780:
1732:
1519:
897:
4289 – Standard Memory
Interface (replaces 4008/4009)
419:
or other non-CPU tasks, but was more widely used for
287:
were expanded to support rapid interrupt processing.
1170:
Bitsavers: MCS-40 Users Manual, November 1974 (PDF)
2374:
1087:"cpu-collection.de >> Intel >> 4040"
16:4-bit microprocessor introduced in 1974 by Intel
1586:
1215:
900:4308 – 1K x 8-bit ROM plus 4 x 4-bit IO ports
221:microprocessor designed and manufactured by
1142:Helmers, Carl T. Jr., ed. (December 1975).
225:. Introduced in 1974 as a successor to the
1222:
1208:
892:display up to 20 characters can be driven.
27:
863:4207 – General Purpose 8-bit Output port
851:3216 and 3226 4-bit parallel bus drivers
374:
366:
297:
289:
2300:Process–architecture–optimization model
1141:
866:4209 – General Purpose 8-bit Input port
322:The 4004 was designed to be used in an
245:and could execute approximately 62,000
2393:Computer-related introductions in 1974
2375:
1081:
1079:
1203:
1180:Pastraiser: i4040 Memory Organisation
869:4211 – General Purpose 8-bit I/O port
241:technology. The 4040 contained 3,000
1229:
845:
252:General performance, bus layout and
1076:
910:
275:To make use of these new pins, the
13:
1158:
823:at 740 kHz with an equal mix.
799:
14:
2404:
929:of Huntsville, Alabama, in 1975.
338:and the next three operated as a
2315:Intel HD, UHD, and Iris Graphics
1403:P6 variant (Enhanced Pentium M)
1135:
1122:
1038:
1024:
1014:
1004:
229:, the 4040 was produced with a
111:Architecture and classification
1165:ChipDB Datasheets: i4040 (PDF)
1109:
1058:
990:
981:
971:
961:
951:
306:
1:
1051:
33:A white ceramic C4040 variant
830:
732:Push-down address call stack
90:500 kHz to 740 kHz
7:
1185:Intel-Vintage: Memory Chips
932:
10:
2409:
1132:, February 1976, page 7-39
1119:, February 1976, page 7-22
785:
777:
769:
761:
753:
745:
737:
730:
715:
708:
555:
540:
533:
511:
315:
2287:
2227:
2039:
1837:
1779:
1730:
1697:
1667:
1660:
1579:
1518:
1418:
1373:
1364:
1237:
1066:"The Life Cycle of a CPU"
701:
698:
696:
689:
686:
684:
677:
674:
672:
664:
661:
659:
652:
649:
647:
640:
637:
635:
628:
625:
623:
616:
613:
611:
604:
601:
599:
592:
589:
587:
580:
577:
575:
567:
564:
562:
522:
520:
518:
302:The plastic P4040 variant
294:The ceramic D4040 variant
202:
197:
187:
182:
165:
149:
144:
127:
115:
110:
102:
94:
80:
75:
59:
51:
43:
38:
26:
944:
906:4702 – 256 x 8-bit EPROM
1190:CPU Zone: MCS-4 chipset
1130:Intel Data Catalog 1976
1117:Intel Data Catalog 1976
939:Intel Intellec 4 Mod 40
362:
311:
247:instructions per second
145:Physical specifications
1398:P6 variant (Pentium M)
383:
372:
303:
295:
2388:4-bit microprocessors
2383:Intel microprocessors
1091:www.cpu-collection.de
903:4316 – 2K x 8-bit ROM
431:Intel 4040 registers
378:
370:
324:electronic calculator
301:
293:
254:arithmetic logic unit
106:12 bits (multiplexed)
379:Intel 4040 DIP chip
332:binary coded decimal
129:Instruction set
117:Technology node
996:i.e. combining the
890:Burroughs Self-Scan
854:4101 – 256 x 4-bit
432:
258:dual inline package
60:Common manufacturer
39:General information
23:
2197:Sandy Bridge-based
1366:Microarchitectures
1351:Microarchitectures
430:
384:
373:
304:
296:
231:10 μm process
21:
2370:
2369:
2283:
2282:
1656:
1655:
1575:
1574:
846:New support chips
815:Voltage: −15 V DC
797:
796:
793:
792:
409:Interrupt handler
237:enhancement-load
217:") is the second
207:
206:
2400:
2202:Ivy Bridge-based
1793:8/16-bit databus
1665:
1664:
1584:
1583:
1580:Current products
1371:
1370:
1231:Intel processors
1224:
1217:
1210:
1201:
1200:
1175:Wikichip: MCS-40
1152:
1151:
1139:
1133:
1126:
1120:
1113:
1107:
1104:
1095:
1094:
1083:
1074:
1073:
1062:
1045:
1042:
1036:
1028:
1022:
1018:
1012:
1008:
1002:
994:
988:
985:
979:
975:
969:
965:
959:
955:
911:Use in computers
437:
436:
433:
429:
401:The 4004 lacked
328:read only memory
270:read only memory
31:
24:
20:
2408:
2407:
2403:
2402:
2401:
2399:
2398:
2397:
2373:
2372:
2371:
2366:
2295:Tick–tock model
2279:
2223:
2212:Broadwell-based
2103:Extreme Edition
2035:
1833:
1775:
1726:
1693:
1652:
1571:
1514:
1414:
1360:
1233:
1228:
1195:CPU Zone: i4702
1161:
1159:Further reading
1156:
1155:
1140:
1136:
1127:
1123:
1114:
1110:
1105:
1098:
1085:
1084:
1077:
1064:
1063:
1059:
1054:
1049:
1048:
1043:
1039:
1029:
1025:
1019:
1015:
1009:
1005:
995:
991:
986:
982:
976:
972:
966:
962:
956:
952:
947:
935:
913:
848:
836:Federico Faggin
833:
802:
800:Characteristics
710:Program counter
557:Index registers
535:Condition codes
502:
497:
492:
487:
482:
477:
472:
467:
462:
457:
452:
447:
442:
365:
340:push-down stack
336:program counter
320:
314:
309:
277:instruction set
178:
161:
71:
34:
17:
12:
11:
5:
2406:
2396:
2395:
2390:
2385:
2368:
2367:
2365:
2364:
2359:
2354:
2349:
2344:
2339:
2334:
2329:
2328:
2327:
2322:
2317:
2312:
2302:
2297:
2291:
2289:
2285:
2284:
2281:
2280:
2278:
2277:
2272:
2267:
2262:
2257:
2252:
2247:
2242:
2237:
2231:
2229:
2225:
2224:
2222:
2221:
2220:
2219:
2214:
2209:
2204:
2199:
2194:
2184:
2183:
2182:
2177:
2172:
2167:
2162:
2157:
2152:
2147:
2142:
2137:
2132:
2127:
2122:
2112:
2111:
2110:
2105:
2100:
2095:
2085:
2084:
2083:
2078:
2068:
2067:
2066:
2061:
2050:
2048:
2037:
2036:
2034:
2033:
2028:
2023:
2022:
2021:
2016:
2014:NetBurst-based
2011:
2001:
1996:
1995:
1994:
1989:
1984:
1979:
1974:
1969:
1964:
1959:
1949:
1948:
1947:
1941:
1930:
1929:
1928:
1923:
1913:
1908:
1907:
1906:
1901:
1896:
1891:
1886:
1881:
1871:
1870:
1869:
1864:
1859:
1848:
1846:
1835:
1834:
1832:
1831:
1826:
1821:
1820:32-bit databus
1818:
1813:
1808:
1803:
1802:16-bit databus
1800:
1794:
1790:
1788:
1777:
1776:
1774:
1773:
1767:
1761:
1755:
1749:
1742:
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1728:
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1662:
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1608:
1603:
1597:
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1581:
1577:
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1570:
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1500:
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1489:
1488:
1478:
1477:
1476:
1466:
1465:
1464:
1454:
1453:
1452:
1442:
1441:
1440:
1429:
1427:
1416:
1415:
1413:
1412:
1407:
1406:
1405:
1400:
1390:
1384:
1382:
1368:
1362:
1361:
1359:
1358:
1353:
1348:
1347:
1346:
1341:
1336:
1331:
1330:
1329:
1324:
1319:
1314:
1309:
1304:
1294:
1293:
1292:
1287:
1282:
1277:
1272:
1267:
1257:
1252:
1241:
1239:
1235:
1234:
1227:
1226:
1219:
1212:
1204:
1198:
1197:
1192:
1187:
1182:
1177:
1172:
1167:
1160:
1157:
1154:
1153:
1134:
1121:
1108:
1096:
1075:
1056:
1055:
1053:
1050:
1047:
1046:
1037:
1023:
1013:
1003:
989:
980:
970:
960:
949:
948:
946:
943:
942:
941:
934:
931:
925:, released by
912:
909:
908:
907:
904:
901:
898:
895:
894:
893:
886:
874:
870:
867:
864:
861:
858:
852:
847:
844:
832:
829:
828:
827:
824:
816:
813:
809:
801:
798:
795:
794:
791:
790:
787:
783:
782:
779:
775:
774:
771:
767:
766:
763:
759:
758:
755:
751:
750:
747:
743:
742:
739:
735:
734:
728:
727:
717:
713:
712:
706:
705:
703:
700:
697:
694:
693:
691:
688:
685:
682:
681:
679:
676:
673:
670:
669:
666:
663:
660:
657:
656:
654:
651:
648:
645:
644:
642:
639:
636:
633:
632:
630:
627:
624:
621:
620:
618:
615:
612:
609:
608:
606:
603:
600:
597:
596:
594:
591:
588:
585:
584:
582:
579:
576:
573:
572:
569:
566:
563:
560:
559:
553:
552:
544:
541:
538:
537:
531:
530:
524:
521:
519:
516:
515:
509:
508:
506:(bit position)
503:
500:
498:
495:
493:
490:
488:
485:
483:
480:
478:
475:
473:
470:
468:
465:
463:
460:
458:
455:
453:
450:
448:
445:
443:
440:
364:
361:
316:Main article:
313:
310:
308:
305:
285:pushdown stack
205:
204:
200:
199:
198:Support status
195:
194:
189:
185:
184:
180:
179:
177:
176:
169:
167:
163:
162:
160:
159:
155:
153:
147:
146:
142:
141:
131:
125:
124:
119:
113:
112:
108:
107:
104:
100:
99:
96:
92:
91:
88:
78:
77:
73:
72:
70:
69:
63:
61:
57:
56:
53:
49:
48:
45:
41:
40:
36:
35:
32:
15:
9:
6:
4:
3:
2:
2405:
2394:
2391:
2389:
2386:
2384:
2381:
2380:
2378:
2363:
2360:
2358:
2355:
2353:
2350:
2348:
2345:
2343:
2340:
2338:
2335:
2333:
2330:
2326:
2323:
2321:
2318:
2316:
2313:
2311:
2308:
2307:
2306:
2303:
2301:
2298:
2296:
2293:
2292:
2290:
2286:
2276:
2273:
2271:
2268:
2266:
2263:
2261:
2258:
2256:
2253:
2251:
2248:
2246:
2243:
2241:
2238:
2236:
2233:
2232:
2230:
2226:
2218:
2217:Skylake-based
2215:
2213:
2210:
2208:
2207:Haswell-based
2205:
2203:
2200:
2198:
2195:
2193:
2192:Nehalem-based
2190:
2189:
2188:
2185:
2181:
2178:
2176:
2173:
2171:
2168:
2166:
2163:
2161:
2158:
2156:
2153:
2151:
2148:
2146:
2143:
2141:
2138:
2136:
2133:
2131:
2128:
2126:
2123:
2121:
2118:
2117:
2116:
2113:
2109:
2106:
2104:
2101:
2099:
2096:
2094:
2091:
2090:
2089:
2086:
2082:
2079:
2077:
2074:
2073:
2072:
2069:
2065:
2062:
2060:
2057:
2056:
2055:
2052:
2051:
2049:
2046:
2042:
2038:
2032:
2029:
2027:
2024:
2020:
2017:
2015:
2012:
2010:
2007:
2006:
2005:
2002:
2000:
1997:
1993:
1990:
1988:
1985:
1983:
1980:
1978:
1975:
1973:
1970:
1968:
1965:
1963:
1960:
1958:
1957:Original i586
1955:
1954:
1953:
1950:
1945:
1942:
1940:
1937:
1936:
1934:
1931:
1927:
1924:
1922:
1919:
1918:
1917:
1914:
1912:
1909:
1905:
1902:
1900:
1897:
1895:
1892:
1890:
1887:
1885:
1882:
1880:
1877:
1876:
1875:
1872:
1868:
1865:
1863:
1860:
1858:
1855:
1854:
1853:
1850:
1849:
1847:
1844:
1840:
1836:
1830:
1827:
1825:
1822:
1819:
1817:
1814:
1812:
1809:
1807:
1804:
1801:
1798:
1795:
1792:
1791:
1789:
1786:
1782:
1778:
1771:
1768:
1765:
1762:
1759:
1756:
1753:
1750:
1747:
1744:
1743:
1741:
1738:
1734:
1729:
1722:
1719:
1716:
1713:
1710:
1707:
1706:
1704:
1701:
1696:
1689:
1686:
1683:
1680:
1679:
1677:
1674:
1670:
1666:
1663:
1659:
1649:
1646:
1642:
1639:
1637:
1634:
1632:
1629:
1627:
1624:
1622:
1619:
1618:
1617:
1614:
1612:
1609:
1607:
1604:
1602:
1599:
1598:
1596:
1593:
1589:
1585:
1582:
1578:
1566:
1563:
1562:
1561:
1558:
1554:
1553:Goldmont Plus
1551:
1550:
1549:
1546:
1542:
1539:
1537:
1534:
1533:
1532:
1529:
1528:
1526:
1524:
1521:
1517:
1511:
1508:
1506:
1503:
1499:
1496:
1495:
1494:
1491:
1487:
1484:
1483:
1482:
1479:
1475:
1472:
1471:
1470:
1467:
1463:
1460:
1459:
1458:
1455:
1451:
1448:
1447:
1446:
1443:
1439:
1436:
1435:
1434:
1431:
1430:
1428:
1425:
1421:
1417:
1411:
1408:
1404:
1401:
1399:
1396:
1395:
1394:
1391:
1389:
1386:
1385:
1383:
1380:
1376:
1372:
1369:
1367:
1363:
1357:
1354:
1352:
1349:
1345:
1342:
1340:
1337:
1335:
1332:
1328:
1325:
1323:
1320:
1318:
1315:
1313:
1310:
1308:
1305:
1303:
1300:
1299:
1298:
1295:
1291:
1288:
1286:
1283:
1281:
1278:
1276:
1273:
1271:
1268:
1266:
1263:
1262:
1261:
1258:
1256:
1253:
1251:
1248:
1247:
1246:
1243:
1242:
1240:
1236:
1232:
1225:
1220:
1218:
1213:
1211:
1206:
1205:
1202:
1196:
1193:
1191:
1188:
1186:
1183:
1181:
1178:
1176:
1173:
1171:
1168:
1166:
1163:
1162:
1149:
1145:
1138:
1131:
1125:
1118:
1112:
1103:
1101:
1092:
1088:
1082:
1080:
1071:
1067:
1061:
1057:
1041:
1034:
1027:
1017:
1007:
999:
993:
984:
974:
964:
954:
950:
940:
937:
936:
930:
928:
927:Comp-Sultants
924:
920:
919:
915:According to
905:
902:
899:
896:
891:
887:
883:
879:
878:
875:
871:
868:
865:
862:
859:
857:
853:
850:
849:
843:
841:
837:
825:
822:
817:
814:
810:
808:
804:
803:
789:Call level 7
788:
784:
781:Call level 6
780:
776:
773:Call level 5
772:
768:
765:Call level 4
764:
760:
757:Call level 3
756:
752:
749:Call level 2
748:
744:
741:Call level 1
740:
736:
733:
729:
725:
721:
718:
714:
711:
707:
704:
695:
692:
683:
680:
671:
668:Index bank 1
667:
658:
655:
646:
643:
634:
631:
622:
619:
610:
607:
598:
595:
586:
583:
574:
571:Index bank 0
570:
561:
558:
554:
551:
549:
545:
542:
539:
536:
532:
528:
525:
517:
514:
510:
507:
504:
499:
494:
489:
484:
479:
474:
469:
464:
459:
454:
449:
444:
439:
438:
435:
434:
428:
425:
422:
418:
413:
410:
406:
404:
399:
397:
393:
387:
382:
377:
369:
360:
357:
352:
347:
345:
341:
337:
333:
329:
325:
319:
300:
292:
288:
286:
282:
281:register file
278:
273:
271:
267:
263:
259:
255:
250:
248:
244:
240:
236:
233:and includes
232:
228:
224:
220:
216:
212:
201:
196:
193:
190:
186:
181:
175:
171:
170:
168:
164:
157:
156:
154:
152:
148:
143:
139:
135:
132:
130:
126:
123:
122:10 μm process
120:
118:
114:
109:
105:
103:Address width
101:
97:
93:
89:
87:
84:
79:
74:
68:
65:
64:
62:
58:
54:
50:
46:
42:
37:
30:
25:
19:
1687:
1661:Discontinued
1498:Cypress Cove
1457:Sandy Bridge
1147:
1137:
1124:
1111:
1090:
1070:The CPUShack
1069:
1060:
1040:
1032:
1026:
1016:
1006:
997:
992:
983:
973:
963:
953:
916:
914:
834:
731:
723:
719:
709:
556:
547:
534:
526:
512:
505:
426:
417:input/output
414:
407:
400:
388:
385:
348:
321:
274:
251:
235:silicon gate
214:
210:
208:
52:Discontinued
18:
1510:Golden Cove
1505:Willow Cove
1486:Cannon Lake
1144:"Micro-440"
529:ccumulator
513:Accumulator
396:chip select
351:multiplexed
307:Description
266:bank select
243:transistors
215:forty-forty
203:Unsupported
188:Predecessor
151:Transistors
76:Performance
2377:Categories
2305:Intel GPUs
2019:Core-based
1783:(external
1671:oriented (
1541:Silvermont
1493:Sunny Cove
1462:Ivy Bridge
1245:Processors
1052:References
856:Static RAM
805:Data bus:
403:interrupts
344:subroutine
318:Intel 4004
262:interrupts
239:PMOS logic
227:Intel 4004
211:Intel 4040
192:Intel 4004
140:-oriented)
95:Data width
86:clock rate
22:Intel 4040
2357:Codenames
2270:StrongARM
2108:Dual-Core
2081:Dual-Core
1992:Dual-Core
1962:OverDrive
1911:A100/A110
1904:OverDrive
1698:pre-x86 (
1565:Gracemont
1474:Broadwell
923:Micro 440
885:recovery.
840:Tom Innes
831:Designers
550:arry flag
421:debugging
268:a second
2362:Larrabee
2240:iAPX 432
2175:11th gen
2170:10th gen
2009:P6-based
1899:RapidCAD
1641:14th gen
1636:13th gen
1631:12th gen
1626:11th gen
1621:10th gen
1548:Goldmont
1536:Saltwell
1450:Westmere
1410:NetBurst
1356:Chipsets
1033:directly
933:See also
819:62
44:Launched
2352:Stratix
2288:Related
2250:Itanium
2165:9th gen
2160:8th gen
2155:7th gen
2150:6th gen
2145:5th gen
2140:4th gen
2135:3rd gen
2130:2nd gen
2125:1st gen
2088:Pentium
2071:Celeron
2031:Tolapai
1952:Pentium
1935:(1998)
1933:Celeron
1824:80387DX
1816:80387SX
1611:Pentium
1606:Celeron
1560:Tremont
1531:Bonnell
1481:Skylake
1469:Haswell
1445:Nehalem
1344:Itanium
1260:Pentium
1255:Celeron
1072:. 2005.
873:(1976).
726:ounter
722:rogram
346:calls.
183:History
172:24-pin
166:Package
2275:XScale
2045:64-bit
2041:x86-64
1946:(2004)
1843:32-bit
1806:80C187
1799:(1980)
1772:(1982)
1766:(1982)
1760:(1982)
1754:(1979)
1748:(1978)
1737:16-bit
1731:Early
1723:(1977)
1717:(1974)
1711:(1972)
1690:(1974)
1684:(1971)
1592:64-bit
1588:x86-64
1438:Penryn
1424:64-bit
1420:x86-64
1379:32-bit
392:binary
381:pinout
98:4 bits
2347:PIIXs
2228:Other
2026:Quark
1839:IA-32
1829:80487
1811:80287
1770:80286
1764:80188
1758:80186
1700:8-bit
1673:4-bit
1375:IA-32
1339:Quark
1238:Lists
945:Notes
807:4-bit
356:latch
223:Intel
219:4-bit
158:3,000
134:4-bit
81:Max.
67:Intel
2342:ICHs
2337:SCHs
2332:PCHs
2265:i960
2260:i860
2255:RISC
2245:EPIC
2235:CISC
2187:Xeon
2115:Core
2054:Atom
2004:Xeon
1999:Core
1916:Atom
1874:i486
1852:i386
1845:x86)
1797:8087
1785:FPUs
1752:8088
1746:8086
1721:8085
1715:8080
1709:8008
1688:4040
1682:4004
1648:Xeon
1616:Core
1601:Atom
1433:Core
1381:x86)
1334:Xeon
1297:Core
1250:Atom
1148:Byte
1021:4001
998:main
918:Byte
882:FIFO
821:kIPS
786:PC7
778:PC6
770:PC5
762:PC4
754:PC3
746:PC2
738:PC1
653:R15
650:R14
641:R13
638:R12
629:R11
626:R10
363:4040
342:for
312:4004
283:and
209:The
55:1981
47:1974
2325:Arc
2310:GMA
2059:SoC
1977:III
1967:Pro
1926:SoC
1889:DX4
1884:DX2
1862:376
1781:x87
1733:x86
1669:BCD
1523:ULV
1520:x86
1275:III
1265:Pro
716:PC
702:R7
699:R6
690:R5
687:R4
678:R3
675:R2
665:R1
662:R0
617:R9
614:R8
605:R7
602:R6
593:R5
590:R4
581:R3
578:R2
568:R1
565:R0
174:DIP
138:BCD
83:CPU
2379::
2320:Xe
2064:CE
1972:II
1921:CE
1894:SL
1879:SX
1867:EX
1857:SX
1393:P6
1388:P5
1322:i9
1317:i7
1312:i5
1307:i3
1270:II
1146:.
1099:^
1089:.
1078:^
1068:.
842:.
543:C
523:A
249:.
213:("
2180:M
2120:2
2098:D
2093:4
2076:D
2047:)
2043:(
1987:M
1982:4
1944:D
1939:M
1841:(
1787:)
1739:)
1735:(
1702:)
1675:)
1594:)
1590:(
1426:)
1422:(
1377:(
1327:M
1302:2
1290:M
1285:D
1280:4
1223:e
1216:t
1209:v
1093:.
724:C
720:P
548:C
527:A
501:0
496:1
491:2
486:3
481:4
476:5
471:6
466:7
461:8
456:9
451:0
446:1
441:2
136:(
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
