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minimum feature size possible using that process, which became known as λ (the Greek letter lambda). λ was set to be one half of the minimum width of a line of POLY or DIFF, and the rules expressed in those terms; "a line has to be two λ wide", "two lines on the same layer must be at least three λ apart", "lines on different layers must be one λ apart" and so forth. The end result was a short set of design rules that applied at any scale. Conway later noted "I vividly recall seeing Mead's jaw drop that spring morning in 1977 as I presented my strategy for λ-based rules on my whiteboard at PARC."
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are closer than 2 micrometers apart". Dozens of such rules were developed for each layer to squeeze out maximum performance. In early 1977, Conway began developing a new set of completely generic rules. These would not offer the highest performance possible for any given system, but her concept was that it would so greatly reduce design time that it could be adapted to a new underling fabrication technology with little or no changes, and such a move would offer many times the performance benefit that using every published trick of the existing rules would.
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Starting with three colored whiteboard pens representing each of the types of layers, MET, POLY, DIFF, Conway developed a set of design rules that worked on every current process. Further development led to the realization that all of the dimensions could be expressed as multiples of some fundamental
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noted that the scale shrinking that formed the basis of Moore's law also affected the performance of the systems. These combined effects implied a massive increase in computing power was about to be unleashed on the industry. The report, published in 1976, suggested that ARPA fund development across
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The mid-1970s were a period of rapid change as new processes were being introduced at different companies at a rapid pace. Each new process led to a set of design rules that often ran to 40 pages. These would include details like "do not place to parallel lines on the metallization layer (MET) that
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and 16/32-bit designs were coming to market, but beyond that seemed too difficult and expensive to contemplate. Mead and Conway felt that there was no theoretical problem impeding progress, simply a number of practical ones, and set about solving these in order to make much more complex designs
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CAD software was an important part of the VLSI effort. This led to major improvements in CAD technology for layout, design rule checking, and simulation. The tools developed in this program were used extensively in both academic research programs and in industry. The ideas were developed in
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One of the primary efforts under VLSI was the creation of the hardware and software needed to automate the design process, which at that point was still largely manual. For a design containing hundreds of thousands of transistors, there was simply no machine short of a
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DARPA's VLSI program built upon these early efforts. Formally initiated by Robert Kahn in 1978, the DARPA program grew out of a study it commissioned at RAND Corporation in 1976 to evaluate the scope of research DARPA might support in VLSI (Sutherland,
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possible. Simply put, the solution was to simplify everything, inventing new practical rules-of-thumb for designers and applying computers to the problems that were larger. This process was aided by the recent introduction of depletion mode
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systems used on larger systems as the feature sizes shrank and Dennard's speed predictions kicked in. It also implied that the entire ACS-1 mainframe would one day fit on a single chip. In 1976, Sutherland and Mead wrote an article in
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With these tools in hand, other VLSI funded projects were able to make huge strides in design complexity, sparking off the RISC revolution. The two major VLSI-related projects were
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a number of fields in order to deal with the complexity that was about to appear due to these "very-large-scale integrated circuits".
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Evolving the High Performance Computing and Communications Initiative to Support the Nation's Information Infrastructure
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The VLSI Project is one of the most influential research projects in modern computer history. Its offspring include
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level because the tools available to the designers were simply unable to deal with more complex designs.
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To address this problem, and thereby allow "average" companies to use automated tools, VLSI funded the
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and Doug Fairbairn to join. Conway had previously worked at IBM on a supercomputer project known as
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Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002
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platform to run these new tools, VLSI also funded a Berkeley project to provide a standardized
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Later that year, Sutherland wrote a letter to his brother Bert who was at that time working at
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on the topic of microelectronics. Over the previous few years, Mead had coined the term "
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Another important part of the MOSIS fabrication process was the development of the
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MOSIS was started in 1981 by the U.S. Defense Advanced Research Program Agency
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that had the memory and performance needed to work on the design as a whole.
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At the time, microprocessor design was plateauing at the 100,000
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Funding a Revolution: Government Support for Computing Research
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being predicted would allow it to surpass the otherwise faster
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in 1978 that provided research funding to a wide variety of
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This is better known today under its 849: 727:"Reminiscences of the VLSI Revolution" 724: 708: 696: 681: 666: 651: 798: 596: 15: 464:Direct outcomes of the VLSI Project 315:implementation, known today as the 304:, which commercialized the design. 164: 13: 768:National Research Council (1995). 734:IEEE Solid-State Circuits Magazine 35:it lacks sufficient corresponding 14: 878: 761: 557:. National Academy Press. 1999. 472:was an offshoot of the Stanford 388: 125:(CAD) tools still in use today, 119:reduced instruction set computer 20: 718: 459:, Caesar and Magic design tools 139:semiconductor fabrication plant 137:and design houses, and its own 121:(RISC) processor concept, many 545: 317:Berkeley Software Distribution 111:Berkeley Software Distribution 1: 597:Pina, C. A. (7 August 2002). 538: 378:remains in operation today. 104:Very Large Scale Integration 7: 294:Stanford University Network 10: 883: 799:Clark, James (July 1982). 725:Conway, Lynn (Fall 2012). 159: 154:Mead and Conway revolution 746:10.1109/MSSC.2012.2215752 611:10.1109/DELTA.2002.994612 149:had little or no impact. 483:Geometry Engine concept 474:SUN workstation project 50:more precise citations. 842:The Pixel-Planes Group 264:Internet based process 102:design, then known as 86:-program initiated by 827:10.1145/965145.801272 156:throughout industry. 135:fabless manufacturing 123:computer-aided design 862:History of computing 605:. pp. 187–191. 307:To provide a common 867:Integrated circuits 286:Stanford University 233:Scientific American 185:wrote a report for 501:parallel processor 418:Connection Machine 805:Computer Graphics 791:978-0-309-05277-1 572:978-0-309-06278-7 409:MIPS architecture 76: 75: 68: 874: 838: 820: 795: 757: 731: 712: 706: 700: 694: 685: 679: 670: 664: 655: 649: 643: 642: 637: 635: 594: 588: 587: 581: 579: 549: 518:Sun Microsystems 479:Silicon Graphics 405:John L. Hennessy 355:, and Synopsis. 302:Sun Microsystems 165:New design rules 96:state of the art 71: 64: 60: 57: 51: 46:this article by 37:inline citations 24: 23: 16: 882: 881: 877: 876: 875: 873: 872: 871: 847: 846: 818:10.1.1.359.8519 792: 764: 729: 721: 716: 715: 707: 703: 695: 688: 680: 673: 665: 658: 650: 646: 633: 631: 621: 595: 591: 577: 575: 573: 551: 550: 546: 541: 466: 457:John Ousterhout 442:Geometry Engine 422:Charles Seitz, 395:David Patterson 391: 383:multichip wafer 349:VLSI Technology 325:Apollo Computer 300:, "SUN", as in 278:Geometry Engine 266: 179:Ivan Sutherland 167: 162: 72: 61: 55: 52: 42:Please help to 41: 25: 21: 12: 11: 5: 880: 870: 869: 864: 859: 845: 844: 839: 811:(3): 127–133. 796: 790: 763: 762:External links 760: 759: 758: 720: 717: 714: 713: 701: 686: 671: 656: 644: 619: 589: 571: 543: 542: 540: 537: 536: 535: 529: 520: 507: 485: 476: 465: 462: 461: 460: 454: 447:Forest Baskett 444: 435: 426: 420: 411: 402: 390: 387: 265: 262: 199:Robert Dennard 193:" to describe 166: 163: 161: 158: 100:microprocessor 74: 73: 56:September 2020 28: 26: 19: 9: 6: 4: 3: 2: 879: 868: 865: 863: 860: 858: 855: 854: 852: 843: 840: 836: 832: 828: 824: 819: 814: 810: 806: 802: 797: 793: 787: 783: 782:10.17226/4948 779: 775: 771: 766: 765: 755: 751: 747: 743: 739: 735: 728: 723: 722: 711:, p. 10. 710: 705: 698: 693: 691: 683: 678: 676: 668: 663: 661: 653: 648: 641: 630: 626: 622: 620:0-7695-1453-7 616: 612: 608: 604: 600: 593: 586: 574: 568: 564: 563:10.17226/6323 560: 556: 555: 548: 544: 533: 530: 528: 527:set-top boxes 524: 523:Stanford MIPS 521: 519: 515: 511: 510:Berkeley RISC 508: 506: 502: 498: 494: 490: 486: 484: 480: 477: 475: 471: 468: 467: 458: 455: 452: 448: 445: 443: 439: 436: 434: 430: 427: 425: 421: 419: 415: 412: 410: 406: 403: 401:RISC I and II 400: 399:Berkeley_RISC 396: 393: 392: 389:Investigators 386: 384: 379: 377: 373: 369: 365: 364:Stanford MIPS 361: 360:Berkeley RISC 356: 354: 350: 344: 342: 338: 334: 330: 326: 322: 318: 314: 310: 305: 303: 299: 295: 291: 287: 283: 279: 274: 272: 271:supercomputer 261: 257: 253: 251: 246: 242: 237: 235: 234: 228: 224: 220: 216: 212: 207: 204: 200: 196: 192: 188: 184: 180: 176: 172: 157: 155: 150: 148: 144: 140: 136: 132: 128: 124: 120: 116: 112: 107: 105: 101: 97: 93: 89: 85: 81: 70: 67: 59: 49: 45: 39: 38: 32: 27: 18: 17: 808: 804: 773: 740:(44): 8–31. 737: 733: 719:Bibliography 704: 699:, p. 8. 684:, p. 7. 669:, p. 6. 654:, p. 5. 647: 639: 634:17 September 632:. Retrieved 602: 592: 583: 578:17 September 576:. Retrieved 553: 547: 512:turned into 505:workstations 489:Pixel-Planes 414:Danny Hillis 382: 380: 371: 367: 357: 345: 341:DragonFlyBSD 308: 306: 293: 284:projects at 282:Pixel-Planes 281: 277: 275: 267: 258: 254: 238: 231: 208: 195:Gordon Moore 175:Tom Everhart 168: 151: 131:workstations 108: 80:VLSI Project 79: 77: 62: 53: 34: 709:Conway 2012 697:Conway 2012 682:Conway 2012 667:Conway 2012 652:Conway 2012 424:Cosmic Cube 215:Lynn Conway 191:Moore's law 171:Carver Mead 88:Robert Kahn 48:introducing 851:Categories 539:References 499:series of 497:WarpEngine 453:networking 429:H. T. Kung 250:NMOS logic 241:transistor 211:Xerox PARC 92:university 31:references 813:CiteSeerX 503:graphics 493:PixelFlow 438:Jim Clark 169:In 1975, 129:graphics 835:10223583 629:35695273 532:BSD Unix 353:Cadnetix 309:software 106:(VLSI). 754:9286356 333:FreeBSD 329:OpenBSD 298:acronym 183:Caltech 160:Project 141:(fab), 44:improve 833:  815:  788:  752:  627:  617:  585:1976). 569:  487:UNC's 339:, and 337:NetBSD 245:16-bit 127:32-bit 117:, the 113:(BSD) 82:was a 33:, but 857:DARPA 831:S2CID 750:S2CID 730:(PDF) 625:S2CID 514:SPARC 470:Sun-1 376:MOSIS 368:MOSIS 219:ACS-1 147:VHSIC 143:MOSIS 84:DARPA 786:ISBN 636:2020 615:ISBN 580:2020 567:ISBN 495:and 433:WARP 362:and 313:Unix 288:and 280:and 223:CMOS 187:ARPA 177:and 115:Unix 78:The 823:doi 778:doi 742:doi 607:doi 559:doi 516:at 451:SUN 321:SGI 227:ECL 203:IBM 201:of 181:of 98:in 853:: 829:. 821:. 809:16 807:. 803:. 784:. 772:. 748:. 736:. 732:. 689:^ 674:^ 659:^ 638:. 623:. 613:. 601:. 582:. 565:. 491:, 449:, 440:, 431:, 416:, 407:, 397:, 351:, 343:. 335:, 331:, 323:, 173:, 133:, 837:. 825:: 794:. 780:: 756:. 744:: 738:4 609:: 561:: 370:( 69:) 63:( 58:) 54:( 40:.

Index

references
inline citations
improve
introducing
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DARPA
Robert Kahn
university
state of the art
microprocessor
Very Large Scale Integration
Berkeley Software Distribution
Unix
reduced instruction set computer
computer-aided design
32-bit
workstations
fabless manufacturing
semiconductor fabrication plant
MOSIS
VHSIC
Mead and Conway revolution
Carver Mead
Tom Everhart
Ivan Sutherland
Caltech
ARPA
Moore's law
Gordon Moore
Robert Dennard

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