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Motorola 88000

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585: 550: 25: 382:. Scoreboarding allowed the CPU to examine the instruction's use of registers and immediately dispatch those that did not rely on previous calculations that were not yet complete; this allowed the instructions to be re-ordered to allow ones that had their required data to run while others had their data loaded from the cache or memory. This instruction reordering could improve usage by as much as 35%. 624: 390:(MMU) were initially external, a cache controller could be connected to either the data or instruction busses, and up to four controllers could be used on either bus. Internally there were three 32-bit busses, connected to the internal units in different ways as required for reading and writing data to the registers. 471:
As the original release saw next to no use outside Motorola's own products, and those traditional customers were starting to move to other RISC designs, the company re-launched the design in a single-chip form, the MC88110. In the late 1980s, several companies were actively examining the 88000 series
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At the time, Motorola marketed the 88000 strictly to the high-end of the market, including "telecommunications, artificial intelligence, graphics, three-dimensional animation, simulation, parallel processing and supercomputers", while they suggested the existing 68k series would continue to be used
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Another feature of the new design was its built-in support for specialized co-processors, or "special function units", or SFUs. In addition to the internal commands supported out of the box, it set aside blocks of 256 instructions that could be used by co-processors. This was aimed at designers who
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systems to be built more easily; a single MC88200 could support up to four MC88100s. However, this also meant that building the most basic system, with a single processor, required both chips and considerable wiring between them, driving up costs. This was likely to be another major reason for the
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cache in the 750,000 transistor MC88200. In contrast to the 68030 where the FPU was truly optional, a practical 88000 system could not be built without at least one MC88200. Systems could include more than one MC88200, producing larger caches and allowing multiple paths to main memory for improved
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files and other hallmarks of the RISC concept, but don't mention the word "RISC" even once. As existing RISC designs had entered the market already, the company decided that they would not attempt to compete with these and would instead produce the world's most powerful processor. To do this, they
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The design also used separate data and instruction address busses. This was costly in terms of pin count; both the instruction and data caches had 32 pins for their address and 32 pins for the data, meaning the complete system used 128 pins on the "P-bus". This design was based on the observation
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project had noted that compilers generally did not use the vast majority of the instructions available to them, and instead used the simplest version of the instructions, often because these performed the fastest. Yet the circuitry providing the other versions of these instructions added overhead
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option (.n), which can be specified to ensure that the subsequent sequential instruction is executed before the branch target instruction, irrespective of the branch condition. Placing branch instruction or other instruction which may change the instruction pointer, in the branch delay slot is
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This shift in the market had the potential to lock Motorola out of the workstation market, one of its only strongholds and among its most lucrative. Apple remained the company's only large vendor outside the workstation space; other users of the 68000, notably
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had planned to use the chips, which alongside adoption by telecommunications vendors had been viewed as guaranteeing the viability of the architecture indefinitely. Motorola offered a PowerPC design as a replacement, which Ford accepted.
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that only about one-third of operations were memory-related; the rest were operating on data already read. This strongly favored having a dedicated instruction pathway to an external instruction cache. The caches and associated
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By 1987 it was widely known that Motorola was designing its own RISC processor. Referred to by the computer industry as the "78000", an homage to the earlier 68000, it became the 88000 when it was released in April 1988.
607:'s *T project, resulted in the MC88110MP, including on-chip communications for use in multi-processor systems. A version capable of speeds up to 100 MHz was planned as the MC88120, but was never built. 290:
Into this came the early 1980's introduction of the RISC concept. At first, there was an intense debate within the industry whether the concept would actually improve performance, or if its longer
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built their Encore-91 machine on the m88k, then introduced a completely ground-up redesign as the Infinity 90 series, but it is unclear how many of these machines were sold. Encore moved to the
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even to the simplest version. Removing these unused instructions from the CPU eliminated this overhead and freed up significant room on the chip. This gave room to increase the number of
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programs would actually slow the execution through additional memory accesses. All such debate was ended by the mid-1980s when the first RISC-based workstations emerged; the latest
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Aimed at the high-end of the market, it was claimed to be the fastest 32-bit processor in the world when it was released. Running at 20 MHz, it reached 34,000 
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derivative, System V/88, for its 88000-based systems. There were two major releases: Release 3.2 Version 3 and Release 4.0 Version 3. Data General AViiON systems ran
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As a side-effect of the complexity of the design, the CPU did not fit on a single chip. The 68030, released a year earlier, had 273,000 transistors, including the
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Like the 68000 before it, the 88000 was considered to be a "clean" design. It is a pure 32-bit load/store architecture with separate instruction and data caches (
1164: 958: 934: 1390: 1471: 1085: 1010: 459:, or around 3.3 MIPS of the 20 MHz 68030. It was also available as a 25 MHz part at 21 MIPS, 48,387 Dhrystones. 1272: 610:
An implementation for embedded applications, the MC88300, was under development during the early 1990s, but was eventually canceled.
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systems, the Series 900 sat on top of each other and connected to one another with bus-like cabling. The concept never caught on.
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ports exist for the MVME systems, LUNA-88K workstations, and Data General AViiON systems. At least one unofficial experimental
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architecture to offer their customer base some sort of upgrade path. At that point the 88000 was dumped as soon as possible.
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easily outperformed any other microprocessor on the market, and its 32-bit architecture was naturally suited to the emerging
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An unusual architectural feature is that both integer instructions and floating-point instructions use the same
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in the workstation market. Instead, most potential customers ignored the 88000, and the system saw little use.
287:. At the time, Intel held about 80% of the overall computer market, while Motorola controlled 90% of the rest. 319: 346:
RISC designs were a conscious effort to tailor the processor to the types of operations being called by the
1220: 534:, and separate data and address buses. It has a small, powerful command set and uses a flat address space. 395: 219: 1457: 656:
series. These were fairly popular, and remain in limited use today. For later models, DG moved to Intel.
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architecture. They worked a few features of the 88000 (such as a compatible bus interface) into the new
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wished to customize the system; new functional units could be added without affecting the existing
186: 33: 1534: 1276: 770: 448: 331: 1017: 1708: 712:, but the project was canceled along with all NeXT hardware projects in 1993. The 4-processor 698: 569: 432: 424: 387: 351: 280: 50: 678:
computers, but issues with memory management meant it didn't perform as well as their earlier
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virtual reality arcade machine as a graphics processor, with one MC88110 per screen of each
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series, for building "out of the box" systems based on the 88000, as well as the Series 900
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was not moving aggressively into the 32-bit space, and the companies that did, notably
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LUNA-88K machines from Japan used the m88k, and were used for a short time on the
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Motorola's articles on the 88000 design speak of single-cycle instructions, large
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Motorola entered the 1980s in a position of strength; their recently-introduced
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Major 3rd party users were limited. The only widespread use would be in the
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took design notes from one of the fastest computers of a previous era, the
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into a single package. An additional modification, made at the behest of
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platform and embedded controller environments. When Motorola joined the
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In the embedded computer space, the "Tri-channel VMS Computer" in the
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introduced their XD88 line of graphics workstations in April 1989.
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model TC-2000 used the MC88100 processor, and scaled to 512 CPUs.
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controller. The idea behind this splitting of duties was to allow
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arrived on the market in 1988, some two years after the competing
1712: 1703: 1604: 1495: 857:"Total share: 30 years of personal computer market share figures" 797: 596: 558: 516: 355: 334:, were floundering in a market that was rapidly standardizing on 251: 747:, but it was later scrapped in favour of later 68K derivatives. 1689: 1609: 1589: 1580: 801: 739:
originally planned to migrate to the 88K architecture from the
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used the MC88100 and MC88110 as the central processor in its
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and other large vendors all began moving to RISC platforms.
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The MC88110 made it into some versions of a never released
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design. It appears to have failed in any practical sense.
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MC88100 RISC Microprocessor User's Manual, Second edition
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It is not clear whether this was an official name or not.
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used the 88110 in their "Power" workstations running the
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on that platform, in the case of Unix workstations, the
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computers employing these MVME boards. Unlike tower or
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There was an attempt to popularize the system with the
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effort to create a new RISC architecture based on the
402:(FPU). The branch and jump instructions incorporate a 378:. In particular, they adopted the 6600's concept of a 1130: 1011:"Standards Wars: Situations, Strategies and Outcomes" 917: 915: 913: 743:, and internally created a machine around it running 451:, compared to about 12 MIPS for a 12.5 MHz 1184:"Tektronix Unveils Family Of Graphics Workstations" 674:used the MC88100 to build the GEC 4310, one of the 1432: 1270: 910: 898: 780:used three 88000s in a triply redundant computer. 557:The first implementation of the 88000 ISA was the 1403:"Motorola's 88000 Risc In Full Volume Production" 1084:"Figure 1-2 and §1.2.7 Multiple External Buses". 1008: 1729: 1264: 886: 1305: 1294: 1055: 1016:. ConsortiumInfo.org. p. 7. Archived from 980: 978: 1445:Badabada.org about m88k hardware and computers 1316: 1061: 1034: 1002: 990: 751:used the 88100 (without the 88200) in its 88K 1465: 876: 874: 872: 870: 407:deprecated to maintain future compatibility. 1111: 975: 755:. Dolphin Server, a spin-off from the dying 618: 1327: 1245: 1202:"AMPM: The Alpha Micro Pageant of Machines" 1112:Papadopoulos; et al. (July 28, 1993). 1040: 959:"MC88100 RISC Microprocessor User's Manual" 935:"MC88100 RISC Microprocessor User's Manual" 783: 1472: 1458: 867: 427:(MMU) on a single chip, with the optional 302:delivered about 3 MIPS, whereas the first 254:, further development of the 88000 ended. 1162: 829:One VUPS is roughly equivalent to 1 MIPS. 69:Learn how and when to remove this message 1181: 732:SuperNode family of telephone switches. 622: 599:, which combined the CPU, FPU, MMU, and 583: 548: 32:This article includes a list of general 1271:Patterson, Barbara (November 2, 1991). 1119:. Massachusetts Institute of Technology 507:In the early 1990s Motorola joined the 1730: 1359:"Motorola's 88000 Family Architecture" 1218: 854: 341: 1453: 1356: 921: 904: 892: 686:based GEC 4000 series computers. The 1248:"PSC Implementation and Integration" 735:Most other users were much smaller. 18: 1239: 1182:Marshall, Martin (April 24, 1989). 1105: 855:Reimer, Jeremy (15 December 2005). 13: 1401: 996: 804:port exists for the MVME systems. 544: 166:Graphics instructions (88110 only) 38:it lacks sufficient corresponding 14: 1759: 1426: 1413: 984: 16:RISC instruction set architecture 1481:Reduced instruction set computer 1227:. pp. 38, 40, 43–44, 46, 48 1138:"Ford Secures 88000 RISC Future" 1041:Cox, Steven (October 19, 2021). 1009:Updegrove, Andrew (March 2006). 592:This was later addressed by the 568:. Mated to this was the MC88200 23: 1389: 1350: 1194: 1175: 1163:Garfinkel, Simson (June 1992). 1156: 1077: 1062:Zipper, Stuart (May 24, 1993). 880: 823: 564:, which included an integrated 522: 1165:"Motorola looks to 68060 chip" 951: 927: 848: 814: 633:Motorola released a series of 502: 1: 1743:Instruction set architectures 1343:Unofficial port of NetBSD 3.x 1273:"Motorola System V/88 R4v3.1" 836: 466: 262: 1206:The Alpha Micro Phun Machine 841: 396:instruction set architecture 220:instruction set architecture 7: 1435:m68k/m88k reference website 1219:Wilson, David (July 1991). 455:of the same vintage in the 10: 1764: 1357:Alsup, Mitch (June 1990). 788:Motorola released its own 722:Carnegie Mellon University 495:was attempting with their 472:for future use, including 410: 257: 1625: 1514: 1488: 1441:Dolphin Server Technology 1144:. 17 June 1991. p. 1 619:Products and applications 581:88000's limited success. 298:running on a 20 MHz 195: 185: 178: 170: 162: 152: 142: 132: 122: 112: 104: 96: 86: 807: 784:Operating system support 765:used the MC88110 in the 701:for image manipulation. 1277:Motorola Computer Group 771:virtual reality headset 588:Motorola 88110 RISC CPU 553:Motorola 88100 RISC CPU 491:group, similar to what 388:memory management units 332:Commodore International 250:in 1991 to develop the 53:more precise citations. 1748:32-bit microprocessors 699:raster graphics editor 635:single-board computers 630: 589: 554: 433:memory management unit 425:memory management unit 352:C programming language 281:National Semiconductor 226:during the 1980s. The 201:32 80-bit (88110 only) 724:. In the early 1990s 710:NeXT RISC Workstation 626: 587: 552: 435:(MMU) and 16 KB 421:arithmetic logic unit 1483:(RISC) architectures 1397:. 14 September 1988. 529:Harvard architecture 1421:. 18 February 1988. 654:Data General AViiON 429:floating point unit 400:floating point unit 361:processor registers 342:Motorola's approach 314:delivered 10 MIPS. 310:with a 16 MHz 83: 1253:. NASA. p. 63 964:. p. 88(3-33) 940:. p. 81(3-26) 737:Alpha Microsystems 631: 612:Ford Motor Company 590: 555: 368:processor register 336:IBM PC compatibles 148:Compare and branch 81: 1738:Motorola products 1725: 1724: 1246:Nobbs, Steven G. 1066:. Electronic News 328:Atari Corporation 205: 204: 79: 78: 71: 1755: 1474: 1467: 1460: 1451: 1450: 1422: 1410: 1398: 1386: 1375:10.1109/40.56325 1344: 1331: 1325: 1320: 1314: 1309: 1303: 1298: 1292: 1291: 1289: 1288: 1279:. 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Index

references
inline citations
improve
introducing
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Motorola
Design
Load–store
Encoding
Branching
Endianness
Registers
General-purpose
Floating point
RISC
instruction set architecture
Motorola
MC88100
SPARC
MIPS
MC88110
MVME
AIM alliance
PowerPC
Motorola 68000
workstation
Intel
National Semiconductor
Intel
machine language

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