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Interrupt descriptor table

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22: 256:) and an offset within that segment. The only difference between trap and interrupt gates is that interrupt gates will disable further processor handling of maskable hardware interrupts, making them suitable to handle hardware-generated interrupts (conversely, trap gates are useful for handling software interrupts and exceptions). A task gate will cause the currently active task-state segment to be switched, using the hardware task switch mechanism to effectively hand over use of the processor to another program, thread or process. 239:
The IDTR register is used to store both the linear base address and the limit (length in bytes minus 1) of the IDT. When an interrupt occurs, the processor multiplies the interrupt vector by the entry size (8 for protected mode, 16 for long mode) and adds the result to the IDT base address. If the
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generated by the CPU have fixed mapping to the first up to 32 interrupt vectors. While 32 vectors (0x00-0x1f) are officially reserved (and many of them are used in newer processors), the original 8086 used only the first five (0-4) interrupt vectors and the IBM PC IDT layout did not respect the
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The IDT is an array of descriptors stored consecutively in memory and indexed by the vector number. It is not necessary to use all of the possible entries: it is sufficient to populate the table up to the highest interrupt vector used, and set the IDT length portion of the
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The descriptors may be either interrupt gates, trap gates or, for 32-bit protected mode only, task gates. Interrupt and trap gates point to a memory location containing code to execute by specifying both a segment (present in either the
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runtime) does not follow the official Intel layout beyond the first five exception vectors implemented in the original 8086. Interrupt 5 is already used for handling the
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and the use of the IDT is triggered by three types of events: processor exceptions, hardware interrupts, and software interrupts, which together are referred to as
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vector numbers are defined by the specific runtime environment, such as the IBM PC BIOS, DOS, or other operating systems. They are triggered by software using the
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The BIOS provides simple real-mode access to a subset of hardware facilities by registering interrupt handlers. They are invoked as software interrupts with the
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The details in the description below apply specifically to the x86 architecture. Other architectures have similar data structures, but may behave differently.
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All INT_NUM between 0x0 and 0x1F, inclusive, are reserved for exceptions by Intel. INT_NUM bigger than 0x1F are to be used for interrupt routines.
177:, the interrupt table is called IVT (interrupt vector table). Up to the 80286, the IVT always resided at the same location in memory, ranging from 801:
If the operating system detects one of these modifications or any other unauthorized patch, it will generate a bug check and shut down the system.
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assembly instruction and the parameters are passed via registers. These interrupts are used for various tasks like detecting the system
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and later, the size and locations of the IVT can be changed in the same way as it is done with the IDT (Interrupt descriptor table) in
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vector numbers correspond to the hardware IRQ numbers. The exact mapping depends on how the Programmable Interrupt Controller such as
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key, IRQ 0-7 is mapped to INT_NUM 0x08-0x0F, and BIOS is using most of the vectors in the 0x10-0x1F range as part of its API.
546: 197:(i.e., via the LIDT (Load Interrupt Descriptor Table Register) instruction) though it does not change the format of it. 65: 43: 36: 730:
Intel® 64 and IA-32 Architectures Software Developer’s Manual, 6.12.1 Exception- or Interrupt-Handler Procedures
189:. Hardware interrupts may be mapped to any of the vectors by way of a programmable interrupt controller. On the 831:(see CHAPTER 5, INTERRUPT AND EXCEPTION HANDLING and CHAPTER 10, ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER)] 627:
that intercepts calls to the IDT and adds in its own processing. This has never been officially supported by
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instruction (either by applications, device drivers or even other interrupt handlers). For example, IBM PC
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Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:System Programming Guide, Part 1
860: 292: 241: 94:. The IDT is used by the processor to determine the memory addresses of the handlers to be executed on 721:
Intel® 64 and IA-32 Architectures Software Developer’s Manual, 20.1.4 Interrupt and Exception Handling
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Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3: System Programming Guide
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Breakpoint (which benefits from the shorter 0xCC encoding of INT 3)
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output and modes, and accessing the disk early in the boot process.
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is checked and the interrupt is handled based on the gate type.
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versions of Windows, where a driver that attempts to use a
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calls to the IDT. This involves writing a kernel mode
766:"Interrupt Table as Implemented by System BIOS/DOS" 545:Control Protection Exception (only available with 164:provides the syscall interface at the vector 0x80. 842: 152:provides video services at the vector 0x10, 226: 66:Learn how and when to remove this message 264: 29:This article includes a list of general 791:"Patching Policy for x64-Based Systems" 843: 259: 15: 763: 695: 13: 702:Bran's Kernel Development Tutorial 200: 86:) is a data structure used by the 35:it lacks sufficient corresponding 14: 872: 822: 240:address is inside the table, the 590: 20: 639:hook will cause the machine to 233: 757: 733: 724: 715: 689: 665: 1: 658: 487:x87 Floating Point Exception 90:architecture to implement an 401:Coprocessor Segment Overrun 168: 7: 646: 415:Invalid Task State Segment 305:Single-step interrupt (see 10: 877: 835:Interrupt Descriptor Table 610: 377:Coprocessor not available 204: 80:interrupt descriptor table 741:"Exceptions - OSDev Wiki" 673:"Exceptions - OSDev Wiki" 534:Virtualization Exception 523:Floating-Point Exception 770:HelpPC Reference Library 449:General Protection Fault 160:at the vector 0x21, and 108:The IDT consists of 256 653:Global Descriptor Table 227:Protected and long mode 185:, and consisted of 256 50:more precise citations. 92:interrupt vector table 403:(386 or earlier only) 355:Bound Range Exceeded 265:Official Intel layout 557:Processor Exception 542:Processor Exception 531:Processor Exception 517:Processor Exception 506:Processor Exception 495:Processor Exception 484:Processor Exception 471:Processor Exception 458:Processor Exception 445:Processor Exception 437:Stack Segment Fault 434:Processor Exception 426:Segment not present 423:Processor Exception 412:Processor Exception 398:Processor Exception 385:Processor Exception 374:Processor Exception 363:Processor Exception 352:Processor Exception 341:Processor Exception 330:Processor Exception 317:Processor Exception 302:Processor Exception 289:Processor Exception 121:Processor exceptions 581:Hardware Interrupt 570:Hardware Interrupt 207:BIOS interrupt call 696:Friesen, Brandon. 281:Short Description 260:Common IDT layouts 142:Software interrupt 128:Hardware interrupt 861:Memory management 588: 587: 110:interrupt vectors 76: 75: 68: 868: 851:X86 architecture 804: 803: 787: 781: 780: 778: 776: 764:Jurgens, David. 761: 755: 754: 752: 751: 737: 731: 728: 722: 719: 713: 712: 710: 708: 693: 687: 686: 684: 683: 669: 498:Alignment Check 293:Division by zero 272: 271: 235: 184: 180: 71: 64: 60: 57: 51: 46:this article by 37:inline citations 24: 23: 16: 876: 875: 871: 870: 869: 867: 866: 865: 841: 840: 825: 808: 807: 789: 788: 784: 774: 772: 762: 758: 749: 747: 739: 738: 734: 729: 725: 720: 716: 706: 704: 698:"IRQs and PICs" 694: 690: 681: 679: 671: 670: 666: 661: 649: 613: 593: 366:Invalid Opcode 267: 262: 229: 209: 203: 201:BIOS interrupts 182: 178: 171: 124:reserved range. 72: 61: 55: 52: 42:Please help to 41: 25: 21: 12: 11: 5: 874: 864: 863: 858: 853: 839: 838: 832: 824: 823:External links 821: 820: 819: 813: 812: 806: 805: 782: 756: 745:wiki.osdev.org 732: 723: 714: 688: 677:wiki.osdev.org 663: 662: 660: 657: 656: 655: 648: 645: 612: 609: 592: 589: 586: 585: 582: 579: 575: 574: 571: 568: 564: 563: 558: 555: 551: 550: 543: 540: 536: 535: 532: 529: 525: 524: 518: 515: 511: 510: 509:Machine Check 507: 504: 500: 499: 496: 493: 489: 488: 485: 482: 478: 477: 472: 469: 465: 464: 459: 456: 452: 451: 446: 443: 439: 438: 435: 432: 428: 427: 424: 421: 417: 416: 413: 410: 406: 405: 399: 396: 392: 391: 386: 383: 379: 378: 375: 372: 368: 367: 364: 361: 357: 356: 353: 350: 346: 345: 342: 339: 335: 334: 331: 328: 324: 323: 318: 315: 311: 310: 303: 300: 296: 295: 290: 287: 283: 282: 279: 276: 266: 263: 261: 258: 236:accordingly. 228: 225: 219:, configuring 205:Main article: 202: 199: 195:protected mode 170: 167: 166: 165: 139: 125: 74: 73: 56:September 2013 28: 26: 19: 9: 6: 4: 3: 2: 873: 862: 859: 857: 854: 852: 849: 848: 846: 836: 833: 830: 827: 826: 818: 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Retrieved 676: 667: 614: 605:Print Screen 595:The IBM PC ( 594: 560: 474: 402: 389:Double Fault 268: 246: 238: 230: 210: 187:far pointers 172: 141: 127: 120: 113: 107: 104: 83: 79: 77: 62: 53: 34: 637:kernel mode 278:Event Type 48:introducing 856:Interrupts 845:Categories 750:2021-04-17 682:2021-04-17 659:References 578:0x70-0x77 567:0x20-0x27 554:0x16-0x1F 462:Page Fault 136:programmed 132:Intel 8259 114:interrupts 100:exceptions 96:interrupts 31:references 796:Microsoft 641:bug check 629:Microsoft 619:programs 584:IRQ 8-15 344:Overflow 307:trap flag 175:real mode 169:Real mode 647:See also 573:IRQ 0-7 561:reserved 475:reserved 275:INT_NUM 811:General 617:Windows 611:Hooking 158:DOS API 44:improve 775:6 June 707:6 June 633:64-bit 625:driver 601:MS-DOS 183:0x03ff 179:0x0000 154:MS-DOS 33:, but 615:Some 539:0x15 528:0x14 514:0x13 503:0x12 492:0x11 481:0x10 468:0x0F 455:0x0E 442:0x0D 431:0x0C 420:0x0B 409:0x0A 395:0x09 382:0x08 371:0x07 360:0x06 349:0x05 338:0x04 327:0x03 314:0x02 299:0x01 286:0x00 191:80286 162:Linux 777:2024 709:2024 621:hook 599:and 597:BIOS 521:SIMD 234:IDTR 150:BIOS 98:and 78:The 547:CET 321:NMI 254:LDT 252:or 250:GDT 242:DPL 221:VGA 213:INT 181:to 173:In 146:INT 134:is 88:x86 84:IDT 847:: 799:. 793:. 768:. 743:. 700:. 675:. 643:. 549:) 309:) 116:: 102:. 779:. 753:. 711:. 685:. 82:( 69:) 63:( 58:) 54:( 40:.

Index

references
inline citations
improve
introducing
Learn how and when to remove this message
x86
interrupt vector table
interrupts
exceptions
interrupt vectors
Intel 8259
programmed
INT
BIOS
MS-DOS
DOS API
Linux
real mode
far pointers
80286
protected mode
BIOS interrupt call
INT
memory layout
VGA
DPL
GDT
LDT
Division by zero
trap flag

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