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signal, independent of the host platform. In this mode, the clock could be divided as in the internal case, or multiplied by 2 for even higher speeds, up to 32.3 Mbit/s in some versions. Using the external clock made it easy to implement LAN adaptors, which normally ran at speeds that were independent of the host computer.
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The SCC's transmission rate could be timed from three sources. For basic RS-232-style communications, the SCC included an internal 300 Hz clock that could be multiplied by 1, 16, 32 to 64, providing data rates between 300 and 19,200 bit/s. Alternately, it could use the clock on the bus as
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Early implementations used receive buffers that were only 3 bytes deep, and a send buffer with a single byte. This meant that the real-world performance was limited by the host platform's ability to continually empty the buffers into its own memory. With network-like communications the SCC itself
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implementation). When used on a machine running at the common 8 MHz clock, this allowed for rates as high as 2 Mbit/s. Finally, the SCC also included inputs for the provision of an external clock. This worked similar to the host clock, but could be used to provide any reference clock
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register, and the UART will convert this to serial form and send it. Generally there were different UARTs for each computer architecture, with the goal of being as low-cost as possible. A good example is the Zilog Z-80 SIO from 1977, designed to work with the widely used
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could cause the remote sender to stop transmission when the buffers were full, and thereby prevent data loss while the host was busy. With conventional async serial this was not possible; on the
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Functionally identical to the Z8030, but using a non-multiplexed "Universal-Bus" designed to allow use with any CPU or host platform, including the Z-80
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with the early versions, adding the 2x speed when used with the external clock, and a number of bug fixes and improvements in the link layer protocols.
107:'s internal parallel format to serial and back. This allows the computer to send data serially simply by doing a regular parallel write to an
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port for much higher performance, up to 10 Mbit/s. Implementation details generally limited performance to 5 Mbit/s or less.
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The SCC is essentially an updated version of the SIO, with more internal logic to allow it to directly implement a number of common
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computer line, which used the Z8530 to implement two serial ports on the back of the early designs, labeled "modem" and "printer".
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Versions of the Z8030 and Z8530 with the synchronous support removed, producing a design more closely matching the original SIO
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devices (Z8443), the SCC added a number of serial-to-parallel modes that allowed internal implementation of a variety of
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this limited RS-232 performance to about 9600 bit/s or less, and as little as 4800 bit/s on earlier models.
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provided by the host platform, and then divide that clock by 4, 8, 16 or 32 (the later two only in the original
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to provide two serial ports with relatively high speeds up to 800 kbit/s. The SIO is technically a
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When used in traditional serial mode, the SCC could be set to use 5, 6, 7 or 8 bits/character, 1,
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Traditional serial communications are normally implemented using a device known as a
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protocols. To start with, the SCC included a hardware implementation of the
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331:"8530, 8531, Z8530, Z8531 Zilog Serial Communications Controller"
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Family of serial port driver integrated circuits made by Zilog
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implementations of the Z80C30 and Z85C30, also known as the
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Updated version of the Z85230 (only), also known as the
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Z80C30/Z85C30/Z80230/Z85230/Z85233 SCC/ESCC User Manual
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with a multiplexed "Z-Bus" interface that matched the
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port for driving legacy systems, or alternately as a
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84:One of the most famous users of the SCC was the
319:"Zilog Z8440 Serial input/Output Controller"
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50:Developed from the earlier
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129:cyclic redundancy check
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366:FreeBSD scc(4) driver
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351:Z85C30 product brief
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210:dual in-line package
159:systems, like IBM's
186:Manchester encoding
41:integrated circuits
151:protocol, part of
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280:Z80230 and Z85230
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216:(PLCC) versions.
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31:, short for
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235:Zilog Z8000
95:Description
37:serial port
306:References
147:-oriented
212:(DIP) or
114:Zilog Z80
52:Zilog SIO
375:Category
284:Updated
220:Versions
43:made by
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39:driver
295:Z85233
239:Z16C00
133:BiSync
79:RS-422
75:RS-232
60:Bisync
301:EMSCC
249:Z8530
245:CPUs
225:Z8030
145:modem
118:USART
86:Apple
45:Zilog
290:ESCC
286:CMOS
270:CMOS
243:8086
231:NMOS
194:NMOS
153:V.42
149:LAPM
141:SDLC
139:and
137:HDLC
101:UART
68:SDLC
66:and
64:HDLC
27:The
182:NRZ
161:SNA
109:I/O
29:SCC
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