1239:
1364:
1396:
1267:
170:). A given sequence of arithmetic operations may thus behave slightly differently compared to a strict single-precision or double-precision IEEE 754 FPU. As this may sometimes be problematic for some semi-numerical calculations written to assume double precision for correct operation, to avoid such problems, the x87 can be configured using a special configuration/status register to automatically round to single or double precision after each operation. Since the introduction of
1215:
1251:
1227:
1352:
1340:
1384:
1328:
1412:
1125:
1295:. This device was tested which includes temperature cycling between -55 and 125 °C, hermeticity sealed and extended burn-in. This military version operates at 16 MHz. This military version was available in 68-lead PGA and quad flatpack. This military version was available for USD $ 1155 in 100-unit of quantities for the PGA version. The 33 MHz version of 387DX was available and it has the performance of 3.4
818:
The 5 MHz 8087 was the original x87 processor. Compared to typical software-implemented floating-point routines on an 8086 (without an 8087), the factors would be even larger, perhaps by another factor of 10 (i.e., a correct floating-point addition in assembly language may well consume over 1000
1199:
Later followed the i80287XL with 387SX microarchitecture with a 287 pinout, the i80287XLT, a special version intended for laptops, as well as other variants. It contains an internal 3/2 multiplier, so that motherboards that ran the coprocessor at 2/3 CPU speed could instead run the FPU at the same
1290:
standard. Released in 1987, two years after the 386 chip, the i387 includes much improved speed over Intel's previous 8087/80287 coprocessors and improved characteristics of its trigonometric functions. It was made available for USD $ 500 in quantities of 100. Shortly afterwards, it was made
207:
notation (minimum to maximum) covers timing variations dependent on transient pipeline status and the arithmetic precision chosen (32, 64 or 80 bits); it also includes variations due to numerical cases (such as the number of set bits, zero, etc.). The L → H notation depicts values
1299:. The following boxed version of 16-, 20-, 25-, and 33-MHz 387DX math coprocessor were available for USD $ 570, $ 647, $ 814, and $ 994 respectfully. The 8087 and 80287's FPTAN and FPATAN instructions are limited to an argument in the range ±π/4 (±45°), and the 8087 and 80287 have no
1187:
in quantities of 100. These boxed version of 80287, 80287-8, and 80287-10 were available for USD $ 212, $ 326, and $ 374 respectively. There was boxed version of 80C287A available for USD $ 457. Other 287 models with 387-like performance are the Intel 80C287, built using
154:
that schedule x87 code effectively. Such a stack-based interface potentially can minimize the need to save scratch variables in function calls compared with a register-based interface (although, historically, design issues in the 8087 implementation limited that potential.)
1183:. Intel's models included variants with specified upper frequency limits ranging from 6 up to 12 MHz. The NMOS version were available 6, 8 and 10 MHz. The available 10 MHz Intel 80287-10 Numerics Coprocessor version was for 250
1207:
microprocessor and was initially the only coprocessor available for the 80386 until the introduction of the 80387 in 1987. However, the 80387 is strongly preferred for its higher performance and the greater capability of its instruction set.
1438:
implementation. When installed into an i486SX system, the i487 disabled the main CPU and took over all CPU operations. The i487 took measures to detect the presence of an i486SX and would not function without the original CPU in place.
49:
routines can. The x87 instruction set includes instructions for basic floating-point operations such as addition, subtraction and comparison, but also for more complex numerical operations, such as the computation of the
1291:
available through Intel's
Personal Computer Enhancement Operation for a retail market price of USD $ 795. The 25 MHz version was available in retail channel for USD $ 1395. The Intel M387 math coprocessor met under
81:
structure ranging from ST(0) to ST(7) with registers that can be directly accessed by either operand, using an offset relative to the top, as well as pushed and popped. (This scheme may be compared to how a
1310:. When a math coprocessor is paired with the 386, the coprocessor performs the floating-point arithmetic in hardware, returning results much faster than an (emulating) software library call.
61:
have had these x87 instructions implemented in the main CPU, but the term is sometimes still used to refer to that part of the instruction set. Before x87 instructions were standard in PCs,
130:
These properties make the x87 stack usable as seven freely addressable registers plus a dedicated accumulator (or as seven independent accumulators). This is especially applicable on
1778:
Intel
Corporation, "New Product Focus Component: A 32-Bit Microprocessor With A Little Help From Some Friends", Special 32-Bit Issue Solutions, November/December 1985, page 13.
1975:
1306:
Without a coprocessor, the 386 normally performs floating-point arithmetic through (relatively slow) software routines, implemented at runtime through a software
1151:
math coprocessor. The 80C187 interface to the main processor is the same as that of the 8087, but its core is essentially that of an 80387SX and is thus fully
1618:
174:, the x87 instructions are not as essential as they once were, but remain important as a high-precision scalar unit for numerical calculations sensitive to
97:(FADD, FMUL, FCOM, etc.) implicitly address ST(0) and ST(1). The non-strict stack model also allows binary operations to use ST(0) together with a direct
1807:
Yoshida, Stacy, "Math
Coprocessors: Keeping Your Computer Up for the Count", Intel Corporation, Microcomputer Solutions, September/October 1990, page 16
1769:
Yoshida, Stacy, "Math
Coprocessors: Keeping Your Computer Up for the Count", Intel Corporation, Microcomputer Solutions, September/October 1990, page 16
1522:
companies design a chip and rely on a fabbed company to manufacture it, while fabbed companies can do both the design and the manufacture by themselves.
115:(a combined destination and left operand). This can also be reversed on an instruction-by-instruction basis with ST(0) as the unmodified operand and ST(
41:). Like other extensions to the basic instruction set, x87 instructions are not strictly needed to construct working programs, but provide hardware and
2996:
166:
standard. By default, the x87 processors all use 80-bit double-extended precision internally (to allow sustained precision over many calculations, see
1313:
The i387 is compatible only with the standard i386 chip, which has a 32-bit processor bus. The later cost-reduced i386SX, which has a narrower 16-bit
2813:
1116:
floating-point processors, marketed for use with the i8080 CPU, were in fact licensed versions of AMD's Am9511 and Am9512 FPUs from 1977 and 1979.)
3001:
1788:
Intel
Corporation, "Personal Computer Enhancement", Personal Computer Enhancement Operation, Order No. 245.2, 10-89/75K/AL/GO, October 1989, page 4
3194:
3099:
3011:
1884:
Intel
Corporation, "Focus: Components: Militarized Peripherals Support M386 Microprocessor", Microcomputer Solutions, March/April 1989, page 12
1798:
Intel
Corporation, "New Product Focus: Systems: SnapIn 386 Module Upgrades PS/2 PCs", Microcomputer Solutions, September/October 1991, page 12
3016:
3006:
2991:
2818:
1715:
1994:
1903:
Intel
Corporation, "Personal Computer Enhancement", Personal Computer Enhancement Operation, Order No. 245.2, 10-89/75K/AL/GO, October 1989
1363:
2808:
2021:
1875:
Intel
Corporation, "NewsBits: 25 MHZ 80387 Available Through Retail Channels", Microcomputer Solutions, September/October 1988, page 1
1573:
1544:
1200:
speed of the CPU. Both 80287XL and 80287XLT offered 50% better performance, 83% less power consumption, and additional instructions.
65:
or programmers had to use rather slow library calls to perform floating-point operations, a method that is still common in (low-cost)
3044:
3104:
37:
that work in tandem with corresponding x86 CPUs. These microchips have names ending in "87". This is also known as the NPX (
2165:
2150:
2074:
2064:
1937:
1922:
Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel
Corporation, Microcomputer Solutions, July/August 1989, page 2
1893:
Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel Corporation, Microcomputer Solutions, July/August 1989, page 2
1598:
1321:, which is compatible with the SX's narrower 16-bit data bus. Intel released the low power version of 387SX coprocessor.
2069:
829:
Companies that have designed or manufactured floating-point units compatible with the Intel 8087 or later models include
2089:
2084:
2079:
123:. Furthermore, the contents in ST(0) can be exchanged with another stack register using an instruction called FXCH ST(
2863:
2720:
950:
3054:
3034:
2297:
2143:
2121:
2116:
2111:
2106:
2059:
2054:
2979:
2126:
2101:
1136:
based) 80188 and 80186 seem to mention specific math coprocessors, both chips were actually paired with an 8087.
2292:
2261:
2232:
2014:
45:
implementations of common numerical tasks, allowing these tasks to be performed much faster than corresponding
196:
Clock cycle counts for examples of typical x87 FPU instructions (only register-register versions shown here).
2364:
2273:
2133:
2096:
2049:
3161:
2335:
2285:
2249:
1214:
930:
547:
135:
1672:
2359:
2330:
2322:
2280:
2268:
2244:
1662:
Numbers are taken from respective processors' data sheets, programming manuals, and optimization manuals.
2138:
2237:
1490:
1238:
151:
78:
1395:
3184:
3114:
2007:
1469:
1699:
2892:
2044:
2030:
208:
corresponding to the lowest (L) and the highest (H) maximal clock frequencies that were available.
33:. It originated as an extension of the 8086 instruction set in the form of optional floating-point
3204:
3189:
3156:
3131:
2725:
1723:
112:
51:
3146:
2202:
2192:
2187:
2155:
1226:
966:
866:
3199:
3136:
2858:
1464:
1317:, can not interface with the i387's 32-bit bus. The i386SX requires its own coprocessor, the
1296:
1818:
34:
2468:
1580:
1555:
1451:
was the last FPU for x86 to be manufactured separately from the CPU, in this case NexGen's
1250:
906:
185:
142:) are optimized down to a zero clock penalty by using one of the integer paths for FXCH ST(
2738:
1383:
8:
3094:
2584:
1977:
Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture
1552:
Unpublished course notes, Computer Science Division, University of California at Berkeley
1424:
994:
3141:
2974:
2969:
2756:
2440:
2435:
2430:
2425:
2420:
1645:
1627:
1307:
159:
146:) in parallel with the FPU instruction. Despite being natural and convenient for human
2964:
2959:
2954:
2949:
2944:
2939:
2934:
2929:
2924:
2907:
2791:
2761:
1828:
1745:
1649:
1613:
1006:
147:
167:
150:
programmers, some compiler writers have found it complicated to construct automatic
2902:
2880:
2844:
2642:
2536:
2391:
2223:
2178:
1637:
1034:
27:
1951:
99:
2499:
2472:
1351:
1339:
1314:
1113:
986:
175:
94:
90:
66:
30:
1144:
89:
There are instructions to push, calculate, and pop values on top of this stack;
3039:
2703:
1370:
1180:
23:
2875:
2743:
1846:"New Product Focus Components: The 32-Bit Computing Engine Full Speed Ahead".
1327:
3178:
2666:
2656:
2615:
2352:
1832:
1431:
1287:
1152:
813:* An effective zero clock delay is often possible, via superscalar execution.
163:
1902:
1787:
1641:
1266:
2919:
2605:
2256:
46:
2825:
2776:
2766:
2661:
2628:
2623:
2610:
2569:
2563:
2557:
2309:
2304:
1427:
1292:
1176:
1172:
1097:
601:
182:
131:
83:
58:
1155:-compliant and capable of executing all the 80387's extra instructions.
16:
Subset of x86 instruction set architecture for floating-point arithmetic
3064:
3059:
2914:
2853:
2798:
2771:
2715:
2596:
2551:
2545:
2520:
2514:
2508:
2487:
2481:
2415:
2400:
2340:
1133:
1109:
1105:
1087:
651:
436:
138:
of 1993 and later), where these exchange instructions (codes D9C8..D9CF
3124:
3109:
3069:
2897:
2786:
2781:
2688:
2683:
2197:
1823:
1014:
765:
745:
440:
93:(FSQRT, FPTAN etc.) then implicitly address the topmost ST(0), while
42:
3119:
2698:
2347:
2209:
1999:
1932:
1632:
62:
1574:"How Intel 8087 stack overflow/underflow should have been handled"
1411:
1124:
3151:
3049:
2887:
2870:
2830:
2751:
2732:
2710:
2410:
2405:
1519:
1318:
934:
898:
1286:) is the first Intel coprocessor to be fully compliant with the
3074:
2840:
2693:
2678:
2387:
2219:
1495:
1374:
1050:
978:
698:
493:
249:
179:
158:
The x87 provides single-precision, double-precision and 80-bit
2638:
2174:
1481:
1452:
1435:
1204:
1189:
1101:
874:
382:
1995:
Everything you always wanted to know about math coprocessors
2986:
2803:
2673:
2651:
2447:
1500:
1485:
1477:
1473:
1193:
1140:
1026:
171:
1861:"NewsBit: Intel 80387 Available Through Retail Channels".
1819:"Chips to Improve Performance Of 386 Machines, Intel Says"
2532:
2319:
1184:
918:
830:
1614:"The pitfalls of verifying floating-point computations"
1704:. pp. 3-25 (iAPX 186/20) and 3-106 (iAPX 188/20).
77:
The x87 registers form an eight-level deep non-strict
1619:
ACM Transactions on Programming Languages and Systems
1810:
188:and extended range available in the 80-bit format.
1565:
3176:
1701:Intel Microprocessor & Peripherals Handbook
1192:III, and the AMD 80EC287 manufactured in AMD's
2386:
1611:
1132:Although the original 1982 datasheet for the (
2015:
1590:
1571:
1542:
1536:
1434:machines. It actually contained a full-blown
1139:However, in 1987, to work with the refreshed
1303:instructions for the SIN and COS functions.
1076:
162:binary floating-point arithmetic as per the
2022:
2008:
1596:
1865:. Intel Corporation: 1. July–August 1987.
1631:
1410:
1265:
1196:process, using only fully static gates.
1123:
86:may be both pushed/popped and indexed.)
3100:Process–architecture–optimization model
1850:. Intel Corporation: 10. May–June 1987.
54:function and its inverse, for example.
3195:Computer-related introductions in 1980
3177:
1913:Borland Turbo Assembler documentation.
1827:. Vol. 9, no. 7. p. 5.
111:), in a role similar to a traditional
2003:
1816:
1697:
1673:"Arithmetic Processors: Then and Now"
1104:. It was built to be paired with the
2029:
1938:Free On-line Dictionary of Computing
1599:"A conversation with William Kahan"
1545:"On the advantages of 8087's stack"
1369:i387 microarchitecture with 16-bit
13:
1128:16 MHz version of the Intel 80C187
1112:microprocessors. (Intel's earlier
1100:for 16-bit processors designed by
14:
3216:
1988:
1543:William Kahan (2 November 1990).
3115:Intel HD, UHD, and Iris Graphics
1746:"80C187 80-BIT MATH COPROCESSOR"
1394:
1382:
1362:
1350:
1338:
1326:
1249:
1237:
1225:
1220:6 MHz version of the Intel 80287
1213:
824:
2203:P6 variant (Enhanced Pentium M)
1944:
1925:
1916:
1907:
1896:
1887:
1878:
1869:
1854:
1839:
1801:
1792:
1781:
1772:
1763:
1738:
1716:"CPU Collection – Model 80187"
1708:
1691:
1665:
1656:
1605:
1597:Jack Woehr (1 November 1997).
1513:
191:
72:
57:Most x86 processors since the
1:
1572:William Kahan (8 July 1989).
1529:
107:specified stack register, ST(
961:, etc.), LC Technology (the
334:80387 (and later 287 models)
134:x86 processors (such as the
7:
1612:David Monniaux (May 2008).
1458:
1293:MIL-STD-883 Rev. C standard
39:Numeric Processor eXtension
10:
3221:
1147:CPU, Intel introduced the
1085:
3087:
3027:
2839:
2637:
2579:
2530:
2497:
2467:
2460:
2379:
2318:
2218:
2173:
2164:
2037:
1817:Moran, Tom (1987-02-16).
1423:(P23N) was marketed as a
1297:megawhetstones per second
1270:Intel 80387 CPU die image
1203:The 80287 works with the
1119:
1077:Architectural generations
1073:and other coprocessors).
721:
718:
715:
712:
709:
706:
703:
561:
323:0.041…0.066 → 0.083…0.133
299:0.034…0.055 → 0.100…0.111
285:
282:
279:
276:
273:
270:
267:
264:
168:IEEE 754 design rationale
160:double-extended precision
1506:
1442:
1406:
1261:
1158:
1642:10.1145/1353445.1353446
1081:
371:0.280…0.552 → 0.580…1.1
26:-related subset of the
2198:P6 variant (Pentium M)
1416:
1271:
1129:
967:National Semiconductor
867:Chips and Technologies
1414:
1269:
1127:
496:(including K6 II/III)
257:rel. 5 MHz 8087
1401:Socket for the 80387
1232:Intel 80287 die shot
907:Harris Semiconductor
1679:. 23 September 2010
1561:on 18 January 2017.
1425:floating-point unit
1096:was the first math
995:ST Microelectronics
757:250…1000 → 800…3200
214:x87 implementation
2997:Sandy Bridge-based
2166:Microarchitectures
2151:Microarchitectures
1417:
1389:i386DX with i387DX
1272:
1130:
1069:), and Xtend (the
1013:processors etc.),
802:186…650 → 543…1900
734:125…500 → 580…2330
178:and requiring the
3170:
3169:
3083:
3082:
2456:
2455:
2375:
2374:
1956:www.cpu-world.com
1308:exception handler
1007:Texas Instruments
820:
814:
809:
808:
148:assembly language
95:binary operations
3212:
3185:X86 architecture
3002:Ivy Bridge-based
2593:8/16-bit databus
2465:
2464:
2384:
2383:
2380:Current products
2171:
2170:
2031:Intel processors
2024:
2017:
2010:
2001:
2000:
1984:
1982:
1967:
1966:
1964:
1962:
1948:
1942:
1941:
1929:
1923:
1920:
1914:
1911:
1905:
1900:
1894:
1891:
1885:
1882:
1876:
1873:
1867:
1866:
1858:
1852:
1851:
1843:
1837:
1836:
1814:
1808:
1805:
1799:
1796:
1790:
1785:
1779:
1776:
1770:
1767:
1761:
1760:
1758:
1756:
1750:
1742:
1736:
1735:
1733:
1731:
1722:. Archived from
1712:
1706:
1705:
1695:
1689:
1688:
1686:
1684:
1677:www.cpushack.com
1669:
1663:
1660:
1654:
1653:
1635:
1609:
1603:
1602:
1594:
1588:
1587:
1586:on 12 June 2013.
1585:
1579:. Archived from
1578:
1569:
1563:
1562:
1560:
1554:. Archived from
1549:
1540:
1523:
1517:
1398:
1386:
1366:
1354:
1342:
1330:
1253:
1241:
1229:
1217:
817:
812:
805:~11000 → 34000×
801:
760:~18000 → 58000×
756:
739:
733:
727:
692:
687:47…116 → 280…700
686:
680:
645:
639:
633:
629:
595:
589:
583:
579:
541:
535:
529:
525:
487:
481:
475:
471:
430:
424:
418:
414:
376:
367:
363:
328:
319:
315:
310:80287 (original)
304:
295:
291:
211:
210:
91:unary operations
67:embedded systems
28:x86 architecture
3220:
3219:
3215:
3214:
3213:
3211:
3210:
3209:
3175:
3174:
3171:
3166:
3095:Tick–tock model
3079:
3023:
3012:Broadwell-based
2903:Extreme Edition
2835:
2633:
2575:
2526:
2493:
2452:
2371:
2314:
2214:
2160:
2033:
2028:
1991:
1980:
1974:
1971:
1970:
1960:
1958:
1950:
1949:
1945:
1931:
1930:
1926:
1921:
1917:
1912:
1908:
1901:
1897:
1892:
1888:
1883:
1879:
1874:
1870:
1860:
1859:
1855:
1845:
1844:
1840:
1815:
1811:
1806:
1802:
1797:
1793:
1786:
1782:
1777:
1773:
1768:
1764:
1754:
1752:
1751:. November 1992
1748:
1744:
1743:
1739:
1729:
1727:
1726:on 23 July 2011
1714:
1713:
1709:
1696:
1692:
1682:
1680:
1671:
1670:
1666:
1661:
1657:
1610:
1606:
1595:
1591:
1583:
1576:
1570:
1566:
1558:
1547:
1541:
1537:
1532:
1527:
1526:
1518:
1514:
1509:
1461:
1445:
1409:
1402:
1399:
1390:
1387:
1378:
1367:
1358:
1355:
1346:
1343:
1334:
1331:
1264:
1257:
1254:
1245:
1242:
1233:
1230:
1221:
1218:
1181:microprocessors
1161:
1122:
1090:
1084:
1079:
1033:coprocessors),
987:Rise Technology
965:coprocessors),
873:coprocessors),
827:
799:
780:
754:
740:~9000 → 42000×
737:
731:
725:
693:~2100 → 13000×
690:
684:
678:
643:
637:
631:
627:
593:
590:20…60 → 100…300
587:
581:
577:
539:
533:
527:
523:
485:
479:
473:
469:
428:
422:
416:
412:
374:
365:
361:
326:
317:
313:
305:1 → 2× as fast
302:
293:
289:
256:
247:
242:
194:
176:round-off error
152:code generators
141:
75:
31:instruction set
17:
12:
11:
5:
3218:
3208:
3207:
3205:Stack machines
3202:
3197:
3192:
3190:Floating point
3187:
3168:
3167:
3165:
3164:
3159:
3154:
3149:
3144:
3139:
3134:
3129:
3128:
3127:
3122:
3117:
3112:
3102:
3097:
3091:
3089:
3085:
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917:processors),
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550:/ Pentium MMX
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164:IEEE 754-1985
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29:
25:
21:
3200:Coprocessors
3172:
2580:
2461:Discontinued
2298:Cypress Cove
2257:Sandy Bridge
1976:
1959:. Retrieved
1955:
1946:
1936:
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1753:. Retrieved
1740:
1728:. Retrieved
1724:the original
1720:cpu-info.com
1719:
1710:
1700:
1693:
1681:. Retrieved
1676:
1667:
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1607:
1592:
1581:the original
1567:
1556:the original
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1145:Intel 80C186
1138:
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56:
47:machine code
38:
35:coprocessors
19:
18:
2310:Golden Cove
2305:Willow Cove
2286:Cannon Lake
1933:Intel 487SX
1626:(3): 1–41.
1428:coprocessor
1177:Intel 80286
1173:coprocessor
1098:coprocessor
796:1300 → 3800
751:1000 → 3200
602:Pentium Pro
329:1.2 → 2.4×
192:Performance
132:superscalar
121:destination
113:accumulator
103:or with an
84:stack frame
73:Description
59:Intel 80486
3179:Categories
3105:Intel GPUs
2819:Core-based
2583:(external
2471:oriented (
2341:Silvermont
2293:Sunny Cove
2262:Ivy Bridge
2045:Processors
1633:cs/0701192
1530:References
1430:for Intel
1179:series of
1106:Intel 8088
1088:Intel 8087
1071:83S87SX-25
963:Green MATH
929:designs),
871:Super MATH
728:500 → 2330
681:233 → 1400
652:Pentium II
437:Cyrix 6x86
431:~18 → 56×
385:(or 80487)
377:~10 → 20×
248:(millions/
105:explicitly
3157:Codenames
3070:StrongARM
2908:Dual-Core
2881:Dual-Core
2792:Dual-Core
2762:OverDrive
2711:A100/A110
2704:OverDrive
2498:pre-x86 (
2365:Gracemont
2274:Broadwell
1863:Solutions
1848:Solutions
1833:0199-6649
1824:InfoWorld
1650:218578808
1049:, etc.),
1015:Transmeta
1005:, etc.),
977:, etc.),
975:Geode GXm
971:Geode GX1
949:, etc.),
921:(various
895:Cyrix MII
766:Pentium 4
746:Athlon 64
534:…..000000
441:Cyrix MII
425:1.0 → 3.1
246:Peak FMUL
241:Max clock
186:precision
119:) as the
63:compilers
43:microcode
3162:Larrabee
3040:iAPX 432
2975:11th gen
2970:10th gen
2809:P6-based
2699:RapidCAD
2441:14th gen
2436:13th gen
2431:12th gen
2426:11th gen
2421:10th gen
2348:Goldmont
2336:Saltwell
2250:Westmere
2210:NetBurst
2156:Chipsets
1983:. Intel.
1730:14 April
1459:See also
1315:data bus
1175:for the
1153:IEEE 754
889:, etc.,
819:cycles).
779:multiple
536:83 → 275
423:….000000
183:mantissa
3152:Stratix
3088:Related
3050:Itanium
2965:9th gen
2960:8th gen
2955:7th gen
2950:6th gen
2945:5th gen
2940:4th gen
2935:3rd gen
2930:2nd gen
2925:1st gen
2888:Pentium
2871:Celeron
2831:Tolapai
2752:Pentium
2735:(1998)
2733:Celeron
2624:80387DX
2616:80387SX
2411:Pentium
2406:Celeron
2360:Tremont
2331:Bonnell
2281:Skylake
2269:Haswell
2245:Nehalem
2144:Itanium
2060:Pentium
2055:Celeron
1935:at the
1520:Fabless
1319:80387SX
1031:Math·Co
935:WinChip
905:etc.),
901:(early
899:Fujitsu
887:Cx87DLC
883:Cx87SLC
879:FasMath
562:1 (0*)
548:Pentium
463:117…129
409:218…303
406:200…273
358:314…487
355:191…497
352:122…129
286:250…800
280:180…186
271:193…203
238:FPATAN
136:Pentium
52:tangent
3075:XScale
2845:64-bit
2841:x86-64
2746:(2004)
2643:32-bit
2606:80C187
2599:(1980)
2572:(1982)
2566:(1982)
2560:(1982)
2554:(1979)
2548:(1978)
2537:16-bit
2531:Early
2523:(1977)
2517:(1974)
2511:(1972)
2490:(1974)
2484:(1971)
2392:64-bit
2388:x86-64
2238:Penryn
2224:64-bit
2220:x86-64
2179:32-bit
1961:9 June
1831:
1648:
1496:3DNow!
1436:i486DX
1432:i486SX
1421:i487SX
1415:i487SX
1375:CORDIC
1357:i387DX
1345:i387SX
1301:direct
1149:80C187
1143:based
1120:80C187
1051:Weitek
1045:, and
1023:TM5800
1019:TM5600
979:NexGen
781:cycles
699:Athlon
638:..0000
630:150 →
588:..0000
574:19…134
571:17…173
526:166 →
494:AMD K6
480:..0000
466:97…161
283:30…540
268:90…145
265:70…100
243:(MHz)
235:FPTAN
232:FSQRT
180:64-bit
3147:PIIXs
3028:Other
2826:Quark
2639:IA-32
2629:80487
2611:80287
2570:80286
2564:80188
2558:80186
2500:8-bit
2473:4-bit
2175:IA-32
2139:Quark
2038:Lists
1981:(PDF)
1755:3 May
1749:(PDF)
1683:3 May
1646:S2CID
1628:arXiv
1584:(PDF)
1577:(PDF)
1559:(PDF)
1548:(PDF)
1507:Notes
1482:SSSE3
1453:Nx586
1449:Nx587
1443:80587
1407:80487
1276:80387
1262:80387
1205:80386
1190:CHMOS
1165:80287
1159:80287
1102:Intel
1053:(the
1037:(the
1029:(the
1017:(the
1011:486DX
999:486DX
989:(the
983:Nx587
981:(the
969:(the
953:(the
933:(the
915:486DX
911:80387
877:(the
875:Cyrix
869:(the
843:486DX
787:20…43
776:20…43
716:16…35
710:13…24
685:..000
669:27…50
663:17…38
654:/ III
618:28…68
612:16…56
580:60 →
514:21…41
505:21…41
472:66 →
460:59…60
451:24…34
415:16 →
403:83…87
383:80486
364:16 →
343:88…91
340:29…57
337:23…34
303:~0000
277:40…50
274:10…15
229:FCOM
226:FXCH
223:FDIV
220:FMUL
217:FADD
79:stack
22:is a
3142:ICHs
3137:SCHs
3132:PCHs
3065:i960
3060:i860
3055:RISC
3045:EPIC
3035:CISC
2987:Xeon
2915:Core
2854:Atom
2804:Xeon
2799:Core
2716:Atom
2674:i486
2652:i386
2645:x86)
2597:8087
2585:FPUs
2552:8088
2546:8086
2521:8085
2515:8080
2509:8008
2488:4040
2482:4004
2448:Xeon
2416:Core
2401:Atom
2233:Core
2181:x86)
2134:Xeon
2097:Core
2050:Atom
1963:2021
1829:ISSN
1757:2023
1732:2018
1685:2023
1501:SIMD
1486:SSE4
1478:SSE3
1474:SSE2
1447:The
1419:The
1377:unit
1373:and
1333:i387
1284:i387
1274:The
1194:CMOS
1169:i287
1163:The
1141:CMOS
1134:NMOS
1110:8086
1094:8087
1092:The
1082:8087
1067:4167
1065:and
1063:3167
1059:1167
1055:1067
1047:Nano
1027:ULSI
1021:and
1003:5x86
959:3C87
955:2C87
947:Nano
925:and
913:and
891:6x86
847:5x86
800:..00
748:(K8)
732:..00
701:(K7)
388:8…20
327:.000
316:6 →
292:5 →
262:8087
255:FMUL
199:The
172:SSE2
3125:Arc
3110:GMA
2859:SoC
2777:III
2767:Pro
2726:SoC
2689:DX4
2684:DX2
2662:376
2581:x87
2533:x86
2469:BCD
2323:ULV
2320:x86
2075:III
2065:Pro
1638:doi
1491:AVX
1470:SSE
1465:MMX
1282:or
1280:387
1185:USD
1108:or
1035:VIA
1025:),
993:),
991:mP6
985:),
951:IIT
931:IDT
927:486
923:387
919:IBM
897:),
865:),
839:387
835:287
831:AMD
773:2…7
770:1…5
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713:1…2
707:1…4
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660:2…5
657:1…3
634:200
609:2…5
606:1…3
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565:1…4
556:1…3
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885:,
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863:K8
861:,
859:K7
857:,
855:K6
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851:K5
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