5045:
pointers containing 16-bit offsets within implied segments and other pointers containing segment addresses and offsets within segments. It is technically possible to use up to 256 KB of memory for code and data, with up to 64 KB for code, by setting all four segment registers once and then only using 16-bit offsets (optionally with default-segment override prefixes) to address memory, but this puts substantial restrictions on the way data can be addressed and memory operands can be combined, and it violates the architectural intent of the Intel designers, which is for separate data items (e.g. arrays, structures, code units) to be contained in separate segments and addressed by their own segment addresses, in new programs that are not ported from earlier 8-bit processors with 16-bit address spaces.
6408:(address bit signals), so the 21st bit of the address, bit 20, was dropped and addresses past 1 MB were mirrors of the low end of the address space (starting from address zero). Since the 80286, all x86 CPUs have at least 24 physical address lines, and bit 20 of the computed address is brought out onto the address bus in real mode, allowing the CPU to address the full 1,114,096 bytes reachable with an x86 segmented address. On the popular IBM PC platform, switchable hardware to disable the 21st address bit was added to machines with an 80286 or later so that all programs designed for 8088/8086-based models could run, while newer software could take advantage of the "high" memory in real mode and the full 16 MB or larger address space in protected mode—see A20 gate.
5224:(with 4 KB page size). Paging allows the CPU to map any page of the virtual memory space to any page of the physical memory space. To do this, it uses additional mapping tables in memory called page tables. Protected mode on the 80386 can operate with paging either enabled or disabled; the segmentation mechanism is always active and generates virtual addresses that are then mapped by the paging mechanism if it is enabled. The segmentation mechanism can also be effectively disabled by setting all segments to have a base address of 0 and size limit equal to the whole address space; this also requires a minimally-sized segment descriptor table of only four descriptors (since the FS and GS segments need not be used).
3806:
3292:
5762:
2832:
or immediate. Among other factors, this contributes to a code size that rivals eight-bit machines and enables efficient use of instruction cache memory. The relatively small number of general registers (also inherited from its 8-bit ancestors) has made register-relative addressing (using small immediate offsets) an important method of accessing operands, especially on the stack. Much work has therefore been invested in making such accesses as fast as register accesses—i.e., a one cycle instruction throughput, in most circumstances where the accessed data is available in the top-level cache.
3801:{\displaystyle {\begin{matrix}{\mathtt {CS}}:\\{\mathtt {DS}}:\\{\mathtt {SS}}:\\{\mathtt {ES}}:\\{\mathtt {FS}}:\\{\mathtt {GS}}:\end{matrix}}\ \ {\begin{bmatrix}{\mathtt {EAX}}\\{\mathtt {EBX}}\\{\mathtt {ECX}}\\{\mathtt {EDX}}\\{\mathtt {ESP}}\\{\mathtt {EBP}}\\{\mathtt {ESI}}\\{\mathtt {EDI}}\end{bmatrix}}+{\begin{pmatrix}\\{\begin{bmatrix}{\mathtt {EAX}}\\{\mathtt {EBX}}\\{\mathtt {ECX}}\\{\mathtt {EDX}}\\{\mathtt {EBP}}\\{\mathtt {ESI}}\\{\mathtt {EDI}}\end{bmatrix}}*{\begin{bmatrix}1\\2\\4\\8\end{bmatrix}}\\\\\end{pmatrix}}+{\rm {displacement}}}
4123:
2824:) is 16, 32 or 64 bits depending on architecture generation (newer processors include direct support for smaller integers as well). Multiple scalar values can be handled simultaneously via the SIMD unit present in later generations, as described below. Immediate addressing offsets and immediate data may be expressed as 8-bit quantities for the frequently occurring cases or contexts where a −128..127 range is enough. Typical instructions are therefore 2 or 3 bytes in length (although some are much longer, and some are single-byte).
5612:, the number of SSE XMM registers has been increased from 8 to 16.) However, the downside was that operating systems had to have an awareness of this new set of instructions in order to be able to save their register states. So Intel created a slightly modified version of Protected mode, called Enhanced mode which enables the usage of SSE instructions, whereas they stay disabled in regular Protected mode. An OS that is aware of SSE will activate Enhanced mode, whereas an unaware OS will only enter into traditional Protected mode.
4610:-like). However, using the sib byte universally is non-optimal, as it produces longer encodings than only using it selectively when necessary. (The main benefit of the sib byte is the orthogonality and more powerful addressing modes it provides, which make it possible to save instructions and the use of registers for address calculations such as scaling an index.) Some special instructions lost priority in the hardware design and became slower than equivalent small code sequences. A notable example is the LODSW instruction.
5443:
often overlooked, the x87 can operate on larger integers with a single instruction than the 8086, 80286, 80386, or any x86 CPU without to 64-bit extensions can, and repeated integer calculations even on small values (e.g., 16-bit) can be accelerated by executing integer instructions on the x86 CPU and the x87 in parallel. (The x86 CPU keeps running while the x87 coprocessor calculates, and the x87 sets a signal to the x86 when it is finished or interrupts the x86 if it needs attention because of an error.)
4302:
5476:). In reality, these new registers were just aliases for the existing x87 FPU stack registers. Hence, anything that was done to the floating-point stack would also affect the MMX registers. Unlike the FP stack, these MMn registers were fixed, not relative, and therefore they were randomly accessible. The instruction set did not adopt the stack-like semantics so that existing operating systems could still correctly save and restore the register state when multitasking without modifications.
3817:
5283:. This is basically a special hybrid operating mode that allows real mode programs and operating systems to run while under the control of a protected mode supervisor operating system. This allows for a great deal of flexibility in running both protected mode programs and real mode programs simultaneously. This mode is exclusively available for the 32-bit version of protected mode; it does not exist in the 16-bit version of protected mode, or in long mode.
2996:(used since the 1950s) also inherently shares many of the same properties; the new method differs mainly in that the translation to micro-operations now occurs asynchronously. Not having to synchronize the execution units with the decode steps opens up possibilities for more analysis of the (buffered) code stream, and therefore permits detection of operations that can be performed in parallel, simultaneously feeding more than one execution unit.
2371:
5703:
5113:
4957:
811:
5806:
the whole x86 ecosystem needed 64-bit memory addressing if x86 was to survive the 64-bit computing era, as workstation and desktop software applications were soon to start hitting the limits of 32-bit memory addressing. However, Intel felt that it was the right time to make a bold step and use the transition to 64-bit desktop computers for a transition away from the x86 architecture in general, an experiment which ultimately failed.
3281:
480:
472:
5850:, therefore 32-bit and 16-bit applications and operating systems could simply continue using an AMD64 processor in protected or other modes, without even the slightest sacrifice of performance and with full compatibility back to the original instructions of the 16-bit Intel 8086. The market responded positively, adopting the 64-bit AMD processors for both high-performance applications and business or home computers.
488:
5344:. The success of the AMD64 line of processors coupled with lukewarm reception of the IA-64 architecture forced Intel to release its own implementation of the AMD64 instruction set. Intel had previously implemented support for AMD64 but opted not to enable it in hopes that AMD would not bring AMD64 to market before Itanium's new IA-64 instruction set was widely adopted. It branded its implementation of AMD64 as
4118:{\displaystyle {\begin{Bmatrix}\\{\begin{matrix}{\mathtt {FS}}:\\{\mathtt {GS}}:\end{matrix}}\ \ {\begin{bmatrix}\vdots \\{\mathtt {GPR}}\\\vdots \end{bmatrix}}+{\begin{pmatrix}\\{\begin{bmatrix}\vdots \\{\mathtt {GPR}}\\\vdots \\\end{bmatrix}}*{\begin{bmatrix}1\\2\\4\\8\end{bmatrix}}\\\\\end{pmatrix}}\\\\\hline \\{\begin{matrix}{\mathtt {RIP}}\end{matrix}}\\\\\end{Bmatrix}}+{\rm {displacement}}}
4393:. The addressing modes were not dramatically changed from 32-bit mode, except that addressing was extended to 64 bits, virtual addresses are now sign extended to 64 bits (in order to disallow mode bits in virtual addresses), and other selector details were dramatically reduced. In addition, an addressing mode was added to allow memory references relative to RIP (the
4325:. Thus, the AX register corresponds to the lower 16 bits of the new 32-bit EAX register, SI corresponds to the lower 16 bits of ESI, and so on. The general-purpose registers, base registers, and index registers can all be used as the base in addressing modes, and all of those registers except for the stack pointer can be used as the index in addressing modes.
2709:, a joint venture between a Chinese company and VIA Technologies, began designing VIA based x86 processors for desktops and laptops. The release of its newest "7" family of x86 processors (e.g. KX-7000), which are not quite as fast as AMD or Intel chips but are still state of the art, had been planned for 2021; as of March 2022 the release had not taken place, however.
3043:
5676:. PAE defines a different page table structure with wider page table entries and a third level of page table, allowing additional bits of physical address. Although the initial implementations on 32-bit processors theoretically supported up to 64 GB of RAM, chipset and other platform limitations often restricted what could actually be used.
4270:. The 8087 appears to the programmer as part of the CPU and adds eight 80-bit wide registers, st(0) to st(7), each of which can hold numeric data in one of seven formats: 32-, 64-, or 80-bit floating point, 16-, 32-, or 64-bit (binary) integer, and 80-bit packed decimal integer. It also has its own 16-bit status register accessible through the
5197:, and this base address is added to a 16-bit offset to create an absolute address. The base address from the table fulfills the same role that the literal value of the segment register fulfills in real mode; the segment registers have been converted from direct registers to indirect registers. Each segment can be assigned one of four
5499:). Given that the MMX's 64-bit MMn registers are aliased to the FPU stack and each of the floating-point registers are 80 bits wide, the upper 16 bits of the floating-point registers are unused in MMX. These bits are set to all ones by any MMX instruction, which correspond to the floating-point representation of
5427:), an apt name since the coprocessors, while used mainly for floating-point calculations, also performed integer operations on both binary and decimal formats. With very few exceptions, the 80486 and subsequent x86 processors then integrated this x87 functionality on chip which made the x87 instructions a
5825:
abilities for translating x86 instructions into IA-64, but this affected the performance of x86 programs so badly that it was rarely, if ever, actually useful to the users: programmers should rewrite x86 programs for the IA-64 architecture or their performance on
Itanium would be orders of magnitude
5805:
By the 2000s, 32-bit x86 processors' limits in memory addressing were an obstacle to their use in high-performance computing clusters and powerful desktop workstations. The aged 32-bit x86 was competing with much more advanced 64-bit RISC architectures which could address much more memory. Intel and
5776:
data and visualized on the diagram above, last updated 2013), the appearance of 64-bit extensions for the x86 architecture enabled 64-bit x86 processors by AMD and Intel (teal hatched and blue hatched, in the diagram, respectively) to replace most RISC processor architectures previously used in such
5624:
numbers too, which 3DNow! had no possibility of doing since a double precision number is 64-bit in size which would be the full size of a single 3DNow! MMn register. At 128 bits, the SSE XMMn registers could pack two double precision floats into one register. Thus SSE2 is much more suitable for
2831:
using three or four bits, the latter via an opcode prefix in 64-bit mode, while at most one operand to an instruction can be a memory location. However, this memory operand may also be the destination (or a combined source and destination), while the other operand, the source, can be either register
6407:
Because a segmented address is the sum of a 16-bit segment multiplied by 16 and a 16-bit offset, the maximum address is 1,114,095 (10FFEF hex), for an addressability of 1,114,096 bytes = 1 MB + 65,520 bytes. Before the 80286, x86 CPUs had only 20 physical address lines
5541:
numbers are packed into each register. The advantage of aliasing the FPU registers is that the same instruction and data structures used to save the state of the FPU registers can also be used to save 3DNow! register states. Thus no special modifications are required to be made to operating systems
4211:
registers. Four of them (AX, BX, CX, DX) are general-purpose registers (GPRs), although each may have an additional purpose; for example, only CX can be used as a counter with the loop instruction. Each can be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as
6397:
Two MSRs of particular interest are SYSENTER_EIP_MSR and SYSENTER_ESP_MSR, introduced on the
Pentium® II processor, which store the address of the kernel mode system service handler and corresponding kernel stack pointer. Initialized during system startup, SYSENTER_EIP_MSR and SYSENTER_ESP_MSR are
5208:
Each time a segment register is loaded in protected mode, the 80286 must read a 6-byte segment descriptor from memory into a set of hidden internal registers. Thus, loading segment registers is much slower in protected mode than in real mode, and changing segments very frequently is to be avoided.
5044:
In order to use more than 64 KB of memory, the segment registers must be used. This created great complications for compiler implementors who introduced odd pointer modes such as "near", "far" and "huge" to leverage the implicit nature of segmented architecture to different degrees, with some
5442:
The operations include arithmetic and transcendental functions, including trigonometric and exponential functions, and instructions that load common constants (such as 0; 1; e, the base of the natural logarithm; log2(10); and log10(2)) into one of the stack registers. While the integer ability is
4227:
One of four possible 'segment registers' (CS, DS, SS and ES) is used to form a memory address. In the original 8086 / 8088 / 80186 / 80188 every address was built from a segment register and one of the general purpose registers. For example ds:si is the notation for an address formed as to allow
5638:
The
Advanced Vector Extensions (AVX) doubled the size of SSE registers to 256-bit YMM registers. It also introduced the VEX coding scheme to accommodate the larger registers, plus a few instructions to permute elements. AVX2 did not introduce extra registers, but was notable for the addition for
1568:
x86-64 is the 64-bit extended architecture of x86, its Legacy Mode preserves the entire and unaltered x86 architecture. The native architecture of x86-64 processors: residing in the 64-bit Mode, lacks of access mode in segmentation, presenting 64-bit architectural-permit linear address space; an
7833:
Figures 5, 6 and 7 also show the 32-bit version of WAS runs applications at full native hardware performance on the POWER and x86-64 platforms. Unlike some 64-bit processor architectures, the POWER and x86-64 hardware does not emulate 32-bit mode. Therefore applications that do not benefit from
5680:
processors define page table structures that theoretically allow up to 52 bits of physical address, although again, chipset and other platform concerns (like the number of DIMM slots available, and the maximum RAM possible per DIMM) prevent such a large physical address space to be realized. On
5438:
double extended precision format. These registers are organized as a stack with ST(0) as the top. This was done in order to conserve opcode space, and the registers are therefore randomly accessible only for either operand in a register-to-register instruction; ST0 must always be one of the two
6032:
APX (Advanced
Performance Extensions) are extensions to double the number of general-purpose registers from 16 to 32 and add new features to improve general-purpose performance. These extensions have been called "generational" and "the biggest x86 addition since 64 bits". Intel contributed APX
5607:
SSE discarded all legacy connections to the FPU stack. This also meant that this instruction set discarded all legacy connections to previous generations of SIMD instruction sets like MMX. But it freed the designers up, allowing them to use larger registers, not limited by the size of the FPU
796:
would make it hard to replace x86 in many segments. AMD's 64-bit extension of x86 (which Intel eventually responded to with a compatible design) and the scalability of x86 chips in the form of modern multi-core CPUs, is underlining x86 as an example of how continuous refinement of established
5297:
In the mid 1990s, it was obvious that the 32-bit address space of the x86 architecture was limiting its performance in applications requiring large data sets. A 32-bit address space would allow the processor to directly address only 4 GB of data, a size surpassed by applications such as
3276:{\displaystyle {\begin{matrix}{\mathtt {CS}}:\\{\mathtt {DS}}:\\{\mathtt {SS}}:\\{\mathtt {ES}}:\end{matrix}}\ \ {\begin{pmatrix}\\{\begin{bmatrix}{\mathtt {BX}}\\{\mathtt {BP}}\end{bmatrix}}+{\begin{bmatrix}{\mathtt {SI}}\\{\mathtt {DI}}\end{bmatrix}}\\\\\end{pmatrix}}+{\rm {displacement}}}
5378:
Long mode is mostly an extension of the 32-bit instruction set, but unlike the 16–to–32-bit transition, many instructions were dropped in the 64-bit mode. This does not affect actual binary backward compatibility (which would execute legacy code in other modes that retain support for those
2999:
The latest processors also do the opposite when appropriate; they combine certain x86 sequences (such as a compare followed by a conditional jump) into a more complex micro-op which fits the execution model better and thus can be executed faster or with fewer machine resources involved.
5585:, following in 2000 with SSE2. The first addition allowed offloading of basic floating-point operations from the x87 stack and the second made MMX almost obsolete and allowed the instructions to be realistically targeted by conventional compilers. Introduced in 2004 along with the
3003:
Another way to try to improve performance is to cache the decoded micro-operations, so the processor can directly access the decoded micro-operations from a special cache, instead of decoding them again. Intel followed this approach with the
Execution Trace Cache feature in their
5895:
processors). The great leap toward 64-bit computing and the maintenance of backward compatibility with 32-bit and 16-bit software enabled the x86 architecture to become an extremely flexible platform today, with x86 chips being utilized from small low-power systems (for example,
2991:
When introduced, in the mid-1990s, this method was sometimes referred to as a "RISC core" or as "RISC translation", partly for marketing reasons, but also because these micro-operations share some properties with certain types of RISC instructions. However, traditional
2875:
The presence of wide SIMD registers means that existing x86 processors can load or store up to 128 bits of memory data in a single instruction and also perform bitwise operations (although not integer arithmetic) on full 128-bits quantities in parallel. Intel's
6329:
companies designed the chip and contracted another company to manufacture it, while fabbed companies would do both the design and the manufacturing themselves. Some companies started as fabbed manufacturers and later became fabless designers, one such example being
5874:
As a result of AMD's 64-bit contribution to the x86 lineage and its subsequent acceptance by Intel, the 64-bit RISC architectures ceased to be a threat to the x86 ecosystem and almost disappeared from the workstation market. x86-64 began to be utilized in powerful
5536:
3DNow! was designed to be the natural evolution of MMX from integers to floating point. As such, it uses exactly the same register naming convention as MMX, that is MM0 through MM7. The only difference is that instead of packing integers into these registers, two
4501:
Although the main registers (with the exception of the instruction pointer) are "general-purpose" in the 32-bit and 64-bit versions of the instruction set and can be used for anything, it was originally envisioned that they be used for the following purposes:
6417:
An extra descriptor record at the top of the table is also required, because the table starts at zero but the minimum descriptor index that can be loaded into a segment register is 1; the value 0 is reserved to represent a segment register that points to no
5603:
technology. AMD licensed the SSE3 instruction set and implemented most of the SSE3 instructions for its revision E and later Athlon 64 processors. The Athlon 64 does not support HyperThreading and lacks those SSE3 instructions used only for HyperThreading.
907:
The table below lists processor models and model series implementing various architectures in the x86 family, in chronological order. Each line item is characterized by significantly improved or commercially successful processor microarchitecture designs.
5439:
operands, either the source or the destination, regardless of whether the other operand is ST(x) or a memory operand. However, random access to the stack registers can be obtained through an instruction which exchanges any specified ST(x) with ST(0).
1552:
architecture, 128-bit VLIW instruction bundle, on-die hardware IA-32 H/W enabling x86 OSes & x86 applications (early generations), software IA-32 EL enabling x86 applications (Itanium 2), Itanium register files are remapped to x86 registers
4332:
format was expanded. To provide backward compatibility, segments with executable code can be marked as containing either 16-bit or 32-bit instructions. Special prefixes allow inclusion of 32-bit instructions in a 16-bit segment or vice versa.
2776:
also use the "amd64" term. Microsoft
Windows, for example, designates its 32-bit versions as "x86" and 64-bit versions as "x64", while installation files of 64-bit Windows versions are required to be placed into a directory called "AMD64".
5615:
SSE is a SIMD instruction set that works only on floating-point values, like 3DNow!. However, unlike 3DNow! it severs all legacy connection to the FPU stack. Because it has larger registers than 3DNow!, SSE can pack twice the number of
5646:
AVX-512 features yet another expansion to 32 512-bit ZMM registers and a new EVEX scheme. Unlike its predecessors featuring a monolithic extension, it is divided into many subsets that specific models of CPUs can choose to implement.
5382:
This was the first time that a major extension of the x86 architecture was initiated and originated by a manufacturer other than Intel. It was also the first time that Intel accepted technology of this nature from an outside source.
5205:. Each segment descriptor also contains a segment limit field which specifies the maximum offset that may be used with the segment. Because offsets are 16 bits, segments are still limited to 64 KB each in 80286 protected mode.
640:. This is due to the fact that this instruction set has become something of a lowest common denominator for many modern operating systems and also probably because the term became common after the introduction of the 80386 in 1985.
2512:
x86 designs. With the x86 naming scheme now legally cleared, other x86 vendors had to choose different names for their x86-compatible products, and initially some chose to continue with variations of the numbering scheme:
4492:
has eight extra 64-bit mask registers K0–K7 for selecting elements in a vector register. Depending on the vector register and element widths, only a subset of bits of the mask register may be used by a given instruction.
5859:
Pentium 4, in July 2004. As a result, the
Itanium processor with its IA-64 instruction set is rarely used and x86, through its x86-64 incarnation, is still the dominant CPU architecture in non-embedded computers.
2784:(formerly known as X86-S). The S in X86S stands for "simplification", which aims to remove support for legacy execution modes and instructions. A processor implementing this proposal would start execution directly in
7074:
5833:
AMD decided to take another path toward 64-bit memory addressing, making sure backward compatibility would not suffer. In April 2003, AMD released the first x86 processor with 64-bit general-purpose registers, the
6749:"Time and again, processor architects have looked at the inelegant x86 architecture and declared it cannot be stretched to accommodate the latest innovations," said Nathan Brookwood, principal analyst, Insight 64.
542:
as a solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the
4262:
are essentially an upgraded 8086 or 8088 CPU, respectively, with on-chip peripherals added, and they have the same CPU registers as the 8086 and 8088 (in addition to interface registers for the peripherals).
7763:
A 2-bit index consisting of PCD and PWT bits of the page table entry is used to select one of four PAT register fields when PAE (page address extensions) is enabled, or when the PDE doesn't describe a large
4385:-prefix (for "register") identifies the 64-bit registers (RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, RFLAGS, RIP), and eight additional 64-bit general registers (R8–R15) were also introduced in the creation of
5185:, which prevents programs from corrupting one another. This is done by using the segment registers only for storing an index into a descriptor table that is stored in memory. There are two such tables, the
763:
There have been several attempts, including by Intel, to end the market dominance of the "inelegant" x86 architecture designed directly from the first simple 8-bit microprocessors. Examples of this are the
6316:
The NEC V20 and V30 also provided the older 8080 instruction set, allowing PCs equipped with these microprocessors to operate CP/M applications at full speed (i.e., without the need to simulate an 8080 by
5239:
were developed for the 386 because it was the first Intel architecture CPU to support paging and 32-bit segment offsets. The 386 architecture became the basis of all further development in the x86 series.
7420:
7386:
7322:
5209:
Actual memory operations using protected mode segments are not slowed much because the 80286 and later have hardware to check the offset against the segment limit in parallel with instruction execution.
5310:
of data, although most 64-bit architectures do not support access to the full 64-bit address space; for example, AMD64 supports only 48 bits from a 64-bit address, split into four paging levels.
575:
4251:. Finally, the instruction pointer (IP) points to the next instruction that will be fetched from memory and then executed; this register cannot be directly accessed (read or written) by a program.
5216:
extended offsets and also the segment limit field in each segment descriptor to 32 bits, enabling a segment to span the entire memory space. It also introduced support in protected mode for
2702:
hold x86 architectural licenses, and from these, only the first two actively produce modern 64-bit designs, leading to what has been called a "duopoly" of Intel and AMD in x86 processors.
2299:
Hybrid design with performance (Golden Cove) and efficiency cores (Gracemont), support for PCIe Gen5 and DDR5, updated
Gaussian Neural Accelerator (GNA3). AVX-512 not officially supported
3026:
instruction set. Transmeta argued that their approach allows for more power efficient designs since the CPU can forgo the complicated decode step of more traditional x86 implementations.
2944:), which means they may execute multiple (partial or complete) x86 instructions simultaneously, and not necessarily in the same order as given in the instruction stream. Some Intel CPUs (
2788:
and would only support 64-bit operating systems. 32-bit code would only be supported for user applications running in ring 3, and would use the same simplified segmentation as long mode.
6799:
5336:
chips for the general market were available four years later, in 2003, after the time was spent for working prototypes to be tested and refined; about the same time, the initial name
2474:
and different solutions at the electronic and physical levels. Quite naturally, early compatible microprocessors were 16-bit, while 32-bit designs were developed much later. For the
2285:
Dual ring interconnect architecture, updated
Gaussian Neural Accelerator (GNA2), new AVX-512 Vector Intersection Instructions, addition of Control-Flow Enforcement Technology (CET)
357:
7857:
6560:
Despite the dominance of x86 in the datacentre it is difficult to ignore the noise vendors have been making over the past couple of years around non-x86 architectures like ARM...
8127:
7488:
7454:
7169:
7135:
6608:
6366:
16-bit and 32-bit microprocessors were introduced during 1978 and 1985 respectively; plans for 64-bit was announced during 1999 and gradually introduced from 2003 and onwards.
7103:
7883:
7203:
7066:
7924:. Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, USA, 2006. ACM 1-59593-451-0/06/0010.
4389:. Also, eight more SSE vector registers (XMM8–XMM15) were added. However, these extensions are only usable in 64-bit mode, which is one of the two modes only available in
1711:(65 nm), wide dynamic execution, μ-op fusion, macro-op fusion in 16-bit and 32-bit mode, on-chip quad-core(Core 2 Quad), Smart Shared L2 Cache (Intel Core 2 "Merom")
6671:
5789:, and others), and 32-bit x86 (green on the diagram), even though Intel initially tried unsuccessfully to replace x86 with a new incompatible 64-bit architecture in the
5469:. It is supported on most subsequent IA-32 processors by Intel and other vendors. MMX is typically used for video processing (in multimedia applications, for instance).
643:
A few years after the introduction of the 8086 and 8088, Intel added some complexity to its naming scheme and terminology as the "iAPX" of the ambitious but ill-fated
6547:
10542:
6437:
Pryce, Dave (May 11, 1989). "80486 32-bit CPU breaks new ground in chip density and operating performance. (Intel Corp.) (product announcement) EDN" (Press release).
6398:
used by the SYSENTER (Intel) or SYSCALL (AMD) instructions to achieve Fast System Calls, about three times faster than the software interrupt method used previously.
7777:
7411:
7377:
7313:
5853:
Seeing the market rejecting the incompatible
Itanium processor and Microsoft supporting AMD64, Intel had to respond and introduced its own x86-64 processor, the
2382:
2912:
that buffers and schedules them in compliance with x86-semantics so that they can be executed, partly in parallel, by one of several (more or less specialized)
11773:
6645:
2725:
size. In 1985, Intel released the 32-bit 80386 (later known as i386) which gradually replaced the earlier 16-bit chips in computers (although typically not in
2908:, current x86 processors employ a few extra decoding steps to split most instructions into smaller pieces called micro-operations. These are then handed to a
30:
This article is about the Intel microprocessor architecture in general. For the 32-bit generation of this architecture that is also referred to as "x86", see
5193:(LDT), each holding up to 8192 segment descriptors, each segment giving access to 64 KB of memory. In the 80286, a segment descriptor provides a 24-bit
5672:
in the Athlon processors, to allow up to 64 GB of RAM to be addressed. Without PAE, physical RAM in 32-bit protected mode is usually limited to 4
5037:
CPUs and earlier had only one operational mode, which is equivalent to real mode in later chips. (On the IBM PC platform, direct software access to the IBM
686:, the x86 line soon grew in features and processing power. Today, x86 is ubiquitous in both stationary and portable personal computers, and is also used in
7044:
5525:
performance of graphic-intensive applications. 3D video game developers and 3D graphics hardware vendors use 3DNow! to enhance their performance on AMD's
5041:
routines is available only in real mode, since BIOS is written for real mode. However, this is not a property of the x86 CPU but of the IBM BIOS design.)
2593:
Customer ignorance of alternatives to the Pentium series further contributed to these designs being comparatively unsuccessful, despite the fact that the
6013:
The introduction of the AMD-V and Intel VT-x instruction sets in 2005 allowed x86 processors to meet the Popek and Goldberg virtualization requirements.
10177:
7747:
6994:
4381:
processor, the x86 architecture extended the 32-bit registers into 64-bit registers in a way similar to how the 16 to 32-bit extension took place. An
629:
were still in common use, the term x86 usually represented any 8086-compatible CPU. Today, however, x86 usually implies binary compatibility with the
9994:
7817:
10745:
10672:
10182:
5625:
scientific calculations than either SSE1 or 3DNow!, which were limited to only single precision. SSE3 does not introduce any additional registers.
8005:
5620:
floats into its registers. The original SSE was limited to only single-precision numbers, like 3DNow!. The SSE2 introduced the capability to pack
2578:
Some early versions of these microprocessors had heat dissipation problems. The 6x86 was also affected by a few minor compatibility problems, the
12676:
10382:
10280:
10192:
8483:
2893:
7951:
6577:
11884:
11067:
5947:
7544:
6792:
728:
and toys, lack significant x86 presence. Simple 8- and 16-bit based architectures are common here, as well as simpler RISC architectures like
11586:
10197:
10187:
10172:
9999:
8249:
5259:
to enable paging and other features. Conversely, segment arithmetic, a common practice in real mode code, is not allowed in protected mode.
10864:
4580:
Some instructions compile and execute more efficiently when using these registers for their designed purpose. For example, using AL as an
2872:(each 64 or 32 bits wide respectively), or alternatively, 2, 4, 8 or 16 integers (each 64, 32, 16 or 8 bits wide respectively).
11743:
11309:
11126:
10372:
10362:
9989:
6357:
during 1993 (as numbers could not be trademarked). However, the term x86 was already established among technicians, compiler writers etc.
6339:
It had a slower FPU however, which is slightly ironic as Cyrix started out as a designer of fast floating-point units for x86 processors.
5821:
market, hoping that it would eventually replace the 32-bit x86. While IA-64 was incompatible with x86, the Itanium processor did provide
4228:
20-bit addressing rather than 16 bits, although this changed in later processors. At that time only certain combinations were supported.
7513:
5251:), the processor initializes in real mode, and then begins executing instructions. Operating system boot code, which might be stored in
4512:
DL/DH/DX/EDX/RDX: Extend the precision of the accumulator (e.g. combine 32-bit EAX and EDX for 64-bit integer operations in 32-bit code)
2884:(AVX) instructions, widening the SIMD registers to 256 bits. The Intel Initial Many Core Instructions implemented by the Knights Corner
1816:
12097:
9202:
9040:
7846:
4595:
opcode of 80C3h. Another example is double precision division and multiplication that works specifically with the AX and DX registers.
4340:; it had eight 80-bit wide registers: st(0) to st(7), like the 8087 and 80287. The 80386 could also use an 80287 coprocessor. With the
2860:
version of this functionality on the same microprocessor as the main processor. In addition to this, modern x86 designs also contain a
1195:
217:
8888:
3008:
microarchitecture (for Pentium 4 processors) and later in the Decoded Stream Buffer (for Core-branded processors since Sandy Bridge).
11089:
10652:
10225:
7262:
7160:
6736:
1549:
647:
processor was tried on the more successful 8086 family of chips, applied as a kind of system-level prefix. An 8086 system, including
6518:
11738:
10642:
8852:
2985:
2043:
345:
7893:
7197:
6835:
5325:
with claimed intentions to produce. That design is currently used in almost all x86 processors, with some exceptions intended for
2756:. Intel soon adopted AMD's architectural extensions under the name IA-32e, later using the name EM64T and finally using Intel 64.
11810:
10367:
10285:
7834:
64-bit features can run with full performance on the 32-bit version of WebSphere running on the above mentioned 64-bit platforms.
7479:
7445:
7128:
6599:
1569:
adapted IA-32 architecture residing in the Compatibility Mode alongside 64-bit Mode is provided to support most x86 applications
5846:
extension (also known as AMD64 or x64). The 64-bit extensions to the x86 architecture were enabled only in the newly introduced
5689:
is active, so while in long mode there is no "non-PAE" mode. PAE mode does not affect the width of linear or virtual addresses.
2678:
Many additions and extensions have been added to the original x86 instruction set over the years, almost consistently with full
12092:
11563:
8057:
7096:
6679:
5538:
367:
Partly. For some advanced features, x86 may require license from Intel; x86-64 may require an additional license from AMD. The
5479:
Each of the MMn registers are 64-bit integers. However, one of the main concepts of the MMX instruction set is the concept of
9085:
7234:
6501:
6476:
6172:
8201:
8031:
7288:
12507:
11631:
10894:
10738:
9346:
9331:
9255:
9245:
7925:
6539:
6147:
2080:
4216:, and BP (base pointer) is often used to point at some other place in the stack, typically above the local variables (see
12517:
11658:
10387:
9250:
9140:
8476:
2440:
2158:
8754:
6893:
2246:
Intel's first implementation of AVX-512 for the consumer segment. Addition of Vector Neural Network Instructions (VNNI)
10785:
10627:
10487:
10482:
9270:
9265:
9260:
8577:
8495:
7798:
Once touted by Intel as a replacement for the x86 product line, expectations for Itanium have been throttled well back.
7785:
7709:
5640:
8533:
383:
1000 series processors have been on the market for more than 21 years, and so cannot be subject to patent claims. The
11825:
11653:
11626:
11005:
10697:
10647:
10044:
9901:
8858:
8737:
8613:
8503:
8242:
6918:
5742:
5458:
5152:
4996:
4328:
Two new segment registers (FS and GS) were added. With a greater number of registers, instructions and operands, the
2861:
2816:
byte order. Memory access to unaligned addresses is allowed for almost all instructions. The largest native size for
2047:
894:
349:
297:
6972:
6636:
4428:
12640:
12203:
11096:
11062:
11057:
10976:
10941:
10235:
10215:
9478:
9324:
9302:
9297:
9292:
9287:
9240:
9235:
8876:
8868:
8507:
8222:
6152:
4317:, but not the segment registers, were expanded to 32 bits. The nomenclature represented this by prefixing an "
4293:
is the floating-point coprocessor for the 80286 and has the same registers as the 8087 with the same data formats.
2797:
2233:
1905:
1819:(EPT) for virtualization, macro-op fusion in 64-bit mode, (Intel Xeon "Bloomfield" with Nehalem microarchitecture)
507:
100:
90:
17:
8882:
8315:
7355:
2451:(CPUs) intended for personal computers and embedded systems. Other companies that designed or manufactured x86 or
875:
12615:
12512:
11913:
11820:
11621:
10842:
10731:
10677:
10527:
10442:
10160:
9307:
9282:
8933:
6871:
2571:, it used a strategy such that dedicated pipeline stages decode x86 instructions into uniform and easily handled
2119:
2115:
2111:
1860:
8156:
Rosenblum, Mendel; Garfinkel, Tal (May 2005). "Virtual machine monitors: current technology and future trends".
7040:
6050:
New conditional instructions for loads, stores, and comparisons with common instructions that don't modify flags
5017:. Real mode is characterized by a 20-bit segmented memory address space (meaning that only slightly more than 1
4274:
instruction, and it is common to simply use some of its bits for branching by copying it into the normal FLAGS.
847:
11641:
11360:
10795:
10582:
9473:
9442:
9413:
9195:
9050:
8469:
8290:
6943:
6449:
5724:
5368:
5134:
4978:
4446:
4410:
4175:, which can be invoked by both hardware and software. The interrupts can cascade, using the stack to store the
2294:
2225:
1909:
832:
710:
6494:
Microprocessors and Interfacing Techniques: For S. E. (Computer Engineering) Semester II of University of Pune
6388:
That is because integer arithmetic generates carry between subsequent bits (unlike simple bitwise operations).
4167:. Only words (two bytes) can be pushed to the stack. The stack grows toward numerically lower addresses, with
2804:. The instruction set is not typical CISC, however, but basically an extended version of the simple eight-bit
11815:
11663:
11636:
11497:
11111:
11072:
10929:
10537:
9545:
9454:
9314:
9277:
9230:
9160:
4470:
32-bit x86 processors (starting with the 80386) also include various special/miscellaneous registers such as
4451:
SIMD registers ZMM0–ZMM31. Lower half of each of the ZMM registers maps onto the corresponding YMM register.
2063:
2026:
1843:
1747:
659:, and simpler Intel-specific system chips, was thereby described as an iAPX 86 system. There were also terms
8565:
7736:
5793:
processor. The main non-x86 architecture which is still used, as of 2014, in supercomputing clusters is the
12252:
12014:
11490:
11451:
11106:
11101:
11035:
10847:
10342:
9516:
9466:
9430:
9105:
8235:
7227:
Practical binary analysis: build your own Linux tools for binary instrumentation, analysis, and disassembly
6762:
5999:
5435:
4313:
processor, the 16-bit general-purpose registers, base registers, index registers, instruction pointer, and
2941:
2722:
2718:
2625:
2035:
1091:
986:
854:
511:
353:
7810:
6851:
Core2 can do macro-op fusion only in 16-bit and 32-bit mode. Core Nehalem can also do this in 64-bit mode.
6307:, which, due to the price sensitivity, low power, and hardware simplicity requirements, outnumber the x86.
2868:
below) where instructions can work in parallel on (one or two) 128-bit words, each containing two or four
12686:
11879:
11576:
11274:
10971:
10622:
10547:
9540:
9511:
9503:
9461:
9449:
9425:
9090:
9045:
2965:
2953:
2103:
2022:
793:
229:
9319:
7979:
2331:
AMD's first implementation of AVX-512 for the consumer segment, iGPU now standard on Ryzen CPU's with 2
12529:
12176:
11593:
11084:
11052:
10822:
10810:
10790:
10687:
9418:
9060:
8762:
8712:
8676:
6065:
5818:
5661:
5656:
5629:
5496:
5492:
5488:
5360:
5355:
In its literature and product version names, Microsoft and Sun refer to AMD64/Intel 64 collectively as
4464:
4355:
integer vector registers (MM0 to MM7, which share lower bits with the 80-bit-wide FPU stack). With the
4286:
4232:
2881:
1976:
1937:
1808:
1510:
1438:
1294:
1279:
1263:
682:
and small multi-user or single-user computers, largely as a response to the successful 8080-compatible
325:
305:
213:
169:
5887:
incarnations), a market which was previously the natural habitat for 64-bit RISC designs (such as the
2317:
X3D chips have an additional 64MB 3D vertically stacked L3 cache (3D V-Cache) for up to 96MB L3 Cache
12691:
12620:
12583:
12573:
10961:
10692:
10682:
10295:
9188:
8827:
8783:
8638:
8521:
8346:
8083:
7606:
6573:
6157:
5983:
5888:
5798:
5556:
4533:
4398:
4363:(SSE) control/status register (MXCSR) and eight 128-bit SSE floating-point registers (XMM0 to XMM7).
4360:
4133:
2969:
2869:
2865:
2821:
2229:
1829:
1329:
1199:
861:
441:
281:
209:
117:
8170:
5273:
There is also a sub-mode of operation in 32-bit protected mode (a.k.a. 80386 protected mode) called
12635:
12042:
11978:
11955:
11805:
11767:
11603:
11553:
11548:
11025:
10919:
10827:
10073:
9225:
9211:
8445:
8275:
7552:
7517:
6142:
6095:
5472:
MMX added 8 new registers to the architecture, known as MM0 through MM7 (henceforth referred to as
5198:
3019:
1049:
1045:
675:. However, this naming scheme was quite temporary, lasting for a few years during the early 1980s.
475:
The x86 architectures were based on the Intel 8086 microprocessor chip, initially released in 1978.
399:
277:
12681:
12588:
12371:
12265:
12229:
12146:
12130:
11972:
11761:
11720:
11708:
11571:
11485:
11406:
11171:
10832:
10775:
10492:
10337:
10312:
9906:
8833:
8538:
8528:
8440:
6100:
6034:
5713:
5186:
5123:
5014:
4967:
4581:
4483:
4437:
is supported). Lower half of each of the YMM registers maps onto the corresponding XMM register.
2961:
2448:
821:
539:
8211:
6205:(and specific electronic and physical implementation) used for a specific microprocessor design.
5434:
Each x87 register, known as ST(0) through ST(7), is 80 bits wide and stores numbers in the
4577:
No particular purposes were envisioned for the other 8 registers available only in 64-bit mode.
843:
12394:
12366:
12276:
12241:
11990:
11984:
11966:
11700:
11694:
11598:
11502:
11393:
11332:
11194:
10837:
10327:
9383:
9373:
9368:
9336:
9095:
9055:
8601:
8217:
8165:
6740:
6350:
6137:
5827:
5517:
In 1997, AMD introduced 3DNow!. The introduction of this technology coincided with the rise of
5465:
microprocessor. The MMX instruction set was developed from a similar concept first used on the
5299:
5190:
5076:
4344:
and all subsequent x86 models, the floating-point processing unit (FPU) is integrated on-chip.
4213:
4160:
2925:
2917:
2801:
2745:
2679:
2669:
2490:
2460:
2432:
1964:
1618:(except some Sempron processors presented as purely x86 processors), on-die memory controller,
1506:
1434:
1170:
1137:
741:
375:) has been on the market for more than 21 years and so cannot be subject to patent claims. The
160:
52:
6077:
5761:
5021:
of memory can be addressed), direct software access to peripheral hardware, and no concept of
2698:
platform (currently inactive). Nevertheless, of those, only Intel, AMD, VIA Technologies, and
2652:
company, were sold for many years following their release in 2005. Centaur's 2008 design, the
12568:
12477:
12223:
11935:
11753:
11512:
11480:
11438:
11350:
11151:
10966:
10956:
10946:
10936:
10906:
10889:
10754:
10563:
10557:
10552:
10532:
10522:
10377:
10317:
10039:
9145:
9110:
8803:
8626:
8364:
8305:
8102:
7656:
6090:
5971:
5826:
worse than on a true x86 processor. The market rejected the Itanium processor since it broke
5452:
5026:
4352:
4322:
4212:
BL). Two pointer registers have special roles: SP (stack pointer) points to the "top" of the
2929:
2905:
2661:
2542:
2416:
1928:
1290:
1191:
1095:
941:
721:
253:
201:
85:
2729:) during the following years; this extended programming model was originally referred to as
12598:
12534:
12120:
11842:
11732:
11679:
11211:
10924:
10780:
10762:
10632:
9649:
8844:
8815:
8560:
7199:
Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture
6182:
5991:
5830:
and preferred to continue using x86 chips, and very few programs were rewritten for IA-64.
5720:
5518:
5130:
4974:
2981:
2973:
1674:, 2nd gen. NetBurst pipelining, dual-core (on-die: Pentium D 8xx, on-chip: Pentium D 9xx),
936:
828:
491:
AMD Athlon (early version), a technically different but fully compatible x86 implementation
269:
9919:
7258:
6744:
5247:
for backward compatibility with the older 8086 class of processors. Upon power-on (a.k.a.
8:
12645:
12630:
12450:
12301:
12283:
12247:
12235:
11889:
11836:
11613:
11529:
11411:
11266:
11161:
11020:
10612:
10607:
10512:
10275:
9765:
8926:
8797:
8694:
8688:
8340:
8006:"Intel Unveils AVX10 and APX Instruction Sets: Unifying AVX-512 For Hybrid Architectures"
7413:
Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture
7379:
Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture
7315:
Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture
6177:
6022:
5403:
5379:
instructions), but it changes the way assembler and compilers for new code have to work.
5165:
In addition to real mode, the Intel 80286 supports protected mode, expanding addressable
4463:, i.e. the 80286 and later processors, also have three descriptor registers (GDTR, LDTR,
4394:
4129:
2857:
2841:
2817:
2583:
2470:
Such x86 implementations were seldom simple copies but often employed different internal
2263:
Multiple Chip Module design with I/O die separate from CPU die(s), Support for PCIe Gen4
2039:
1144:
593:
computers sold are based on the x86 architecture family, while mobile categories such as
301:
285:
257:
7013:
671:(for multimodule boards based on the 8086-architecture), all together under the heading
12502:
12494:
12346:
12321:
12125:
12000:
11524:
11465:
11345:
11077:
10805:
10667:
10575:
10322:
10155:
10150:
9937:
9621:
9616:
9611:
9606:
9601:
9150:
8990:
8435:
8183:
6828:
6718:
5987:
5979:
5963:
5959:
5955:
5941:
5608:
registers. The designers created eight 128-bit registers, named XMM0 through XMM7. (In
5596:
5413:
5364:
4188:
2769:
2765:
2649:
2621:
2408:
1878:
1501:
789:
392:
10145:
10140:
10135:
10130:
10125:
10120:
10115:
10110:
10105:
7681:
6519:"AMD Sets All-Time CPU Market Share Record as Intel Gains in Desktop and Notebook PCs"
3826:
12455:
12422:
12338:
12270:
12171:
12161:
12151:
12082:
12077:
12072:
11995:
11924:
11830:
11790:
11423:
11373:
11323:
11299:
11181:
11121:
11116:
10998:
10914:
10712:
10088:
9972:
9942:
9165:
9080:
9030:
8980:
8767:
8545:
8352:
8270:
7587:
7240:
7230:
6523:
6497:
6472:
6202:
6162:
6132:
5522:
5275:
5268:
5202:
5022:
4266:
The 8086, 8088, 80186, and 80188 can use an optional floating-point coprocessor, the
4164:
4128:
Instruction relative addressing in 64-bit code (RIP + displacement, where RIP is the
2937:
2933:
2538:
2475:
2471:
2404:
1698:
1693:
1483:
1286:
1251:
785:
745:
687:
567:
563:
8187:
6722:
12625:
12558:
12544:
12399:
12306:
12260:
12067:
12062:
12057:
12052:
12047:
12037:
11907:
11874:
11785:
11780:
11689:
11541:
11536:
11519:
11507:
11446:
11010:
10988:
10874:
10852:
10770:
10707:
10702:
10589:
10083:
10061:
10025:
9823:
9717:
9572:
9404:
9359:
8729:
8175:
7301:
The FNSTSW AX form of the instruction is used primarily in conditional branching...
6710:
5921:
5917:
5769:
5621:
5617:
5318:
5252:
5182:
5090:
5060:
4471:
4236:
4221:
4176:
4137:
3015:
2761:
2691:
2637:
2392:
2002:
1983:
1833:
1426:
1184:
1088:
983:
946:
757:
698:
679:
630:
602:
586:
527:
70:
66:
62:
4681:
64-bit mode-only General Purpose Registers (R8, R9, R10, R11, R12, R13, R14, R15)
3286:
Addressing modes for 32-bit x86 processor modes can be summarized by the formula:
724:
applications (using tiny batteries), and low-cost microprocessor markets, such as
12539:
12524:
12472:
12376:
12351:
12188:
12181:
12032:
12027:
12022:
11961:
11869:
11859:
11581:
11416:
11368:
11131:
11015:
10983:
10884:
10879:
10800:
9680:
9653:
8772:
8492:
8430:
8358:
8285:
7284:
6304:
5951:
5929:
5582:
5326:
5303:
5166:
4547:
3811:
Addressing modes for the 64-bit processor mode can be summarized by the formula:
3034:
2913:
2726:
2629:
2572:
2456:
2145:
AVX-512 (restricted to Cannon Lake-U and workstation/server variants of Skylake)
1733:
1518:
1489:
1459:
1226:
1187:
868:
797:
industry standards can resist the competition from completely new architectures.
717:
633:
610:
598:
571:
531:
122:
107:
8128:"Intel® Advanced Performance Extensions (Intel® APX) Architecture Specification"
7916:
2537:) lines of Cyrix designs, which were the first x86 microprocessors implementing
12650:
12484:
12467:
12460:
12356:
12213:
11950:
11864:
11795:
11378:
11340:
11289:
11284:
11279:
10993:
10817:
10452:
10220:
9884:
9035:
8969:
8919:
8420:
8403:
8398:
8388:
8323:
8300:
7575:
6969:"Setup and installation considerations for Windows x64 Edition-based computers"
5868:
5600:
5586:
5483:, which means instead of using the whole register for a single 64-bit integer (
5409:
5256:
5221:
5174:
5102:
4475:
4460:
4314:
4282:
2695:
1957:
1619:
1122:
1118:
1041:
725:
644:
421:
10056:
9924:
7244:
6919:"Zhaoxin aiming at 2021 release for its 7nm x86 CPUs - CPU - News - HEXUS.net"
5855:
2812:
architectures. Byte-addressing is enabled and words are stored in memory with
12670:
12445:
12361:
11401:
11383:
11176:
10869:
10617:
10602:
10517:
10462:
10447:
9847:
9837:
9796:
9533:
8461:
8408:
8334:
7591:
7225:
Andriesse, Dennis (2019). "6.5 Effects of Compiler Settings on Disassembly".
5905:
5876:
5766:
4479:
4301:
4244:
4217:
2664:. It was introduced at about the same time (in 2008) as Intel introduced the
2349:
2176:
2068:
2010:
1963:
PCI-E add-on card coprocessor for XEON based system, Manycore Chip, In-order
1892:
1801:
1728:
1723:
926:
695:
483:
Intel Core 2 Duo, an example of an x86-compatible, 64-bit multicore processor
11304:
2590:
had somewhat disappointing performance when it was (eventually) introduced.
1649:
1478:
12655:
12593:
12409:
12386:
12198:
11919:
10857:
10657:
10569:
10507:
10437:
10415:
10410:
10100:
9786:
9437:
9100:
8295:
8280:
7888:
6215:
6040:
According to the architecture specification, the main features of APX are:
5416:
5194:
4607:
4329:
2909:
2892:
instructions implemented by the Knights Landing Xeon Phi processors and by
2877:
2694:
and many other companies; there are also open implementations, such as the
2522:
1945:
1765:
1689:
1606:
1597:
1585:
1581:
1237:
261:
6080:
prefix which has four variants used for different groups of instructions.
5809:
In 2001, Intel attempted to introduce a non-x86 64-bit architecture named
5801:(blue with diamond tiling in the diagram), with SPARC as a distant second.
2780:
In 2023, Intel proposed a major change to the architecture referred to as
407:
16-bit: 6 semi-dedicated registers, BP and SP are not general-purpose
12440:
12404:
12115:
12087:
11945:
11800:
10723:
10637:
10006:
9957:
9947:
9842:
9809:
9804:
9791:
9750:
9744:
9738:
9490:
9485:
9075:
9065:
8791:
6968:
6714:
6257:
6253:
6044:
16 additional general-purpose registers, called the Extended GPRs (EGPRs)
5897:
5880:
5665:
5462:
5213:
5064:
5054:
5034:
5030:
4522:
4378:
4356:
4348:
4310:
4290:
4278:
4259:
4255:
2921:
2682:. The architecture family has been implemented in processors from Intel,
2657:
2575:, a method that has remained the basis for most x86 designs to this day.
2509:
2486:
compatible processors, often named similarly to Intel's original chips.
2326:
2308:
2272:
2255:
2237:
2167:
Manycore CPU and coprocessor for Xeon systems, Airmont (Atom) based core
1313:
1273:
1180:
1174:
1160:
1111:
1069:
1029:
1009:
1005:
691:
648:
606:
556:
552:
548:
544:
368:
8179:
6060:
Extended GPRs for general purpose instructions are encoded using 2-byte
2748:
extended this 32-bit architecture to 64 bits and referred to it as
12326:
12316:
12311:
12293:
12193:
12166:
11428:
11261:
11231:
10951:
10245:
10240:
10095:
10034:
9979:
9952:
9896:
9777:
9732:
9726:
9701:
9695:
9689:
9668:
9662:
9596:
9581:
9521:
9070:
8393:
8383:
8058:"Intel's Generational On-Chip Change APX Will Make All the Apps Faster"
7918:
A Comparison of Software and Hardware Techniques for x86 Virtualization
7632:
7347:
6261:
6061:
6003:
5975:
5925:
5901:
5884:
5727: in this section. Unsourced material may be challenged and removed.
5466:
5420:
5236:
5137: in this section. Unsourced material may be challenged and removed.
4981: in this section. Unsourced material may be challenged and removed.
4285:, three special registers hold descriptor table addresses (GDTR, LDTR,
4267:
4240:
4204:
4200:
2957:
2845:
2813:
2809:
2805:
2665:
2534:
2276:
1992:
1941:
1870:
1781:
1719:
1639:
1635:
1631:
1627:
1463:
1360:
1337:
1309:
1241:
1131:
968:
964:
753:
749:
594:
535:
523:
519:
129:
8227:
7487:. Intel. 1983. Chapter 6, "Memory Management and Virtual Addressing".
6787:
6785:
5081:
The System Management Mode (SMM) is only used by the system firmware (
5009:
Real Address mode, commonly called Real mode, is an operating mode of
4521:
BP/EBP/RBP: Stack base pointer for holding the address of the current
12417:
12414:
12156:
11226:
11204:
10597:
10305:
10290:
10250:
10078:
9967:
9962:
9869:
9864:
9378:
9135:
9025:
8985:
8821:
8743:
8584:
8516:
8413:
8223:
AMD Developer Guides, Manuals & ISA Documents, AMD64 Architecture
7781:
6863:
6303:
The embedded processor market is populated by more than 25 different
5847:
5794:
5786:
5686:
5682:
5592:
5306:. Using 64-bit addresses, it is possible to directly address 16
5292:
5244:
5227:
Paging is used extensively by modern multitasking operating systems.
4946:
4591:
of 04h, whilst using the BL register produces the generic and longer
4390:
4248:
4172:
3011:
2993:
2949:
2785:
2757:
2633:
2505:
2370:
2107:
1658:
1654:
1602:
1577:
1474:
1447:
1392:
1388:
1245:
1148:
1127:
1073:
994:
777:
773:
683:
293:
273:
174:
155:
151:
8206:
7014:"Intel Publishes "X86-S" Specification For 64-bit Only Architecture"
5702:
5423:, 80287 and 80387, abbreviated x87. This was also known as the NPX (
5112:
4956:
2827:
To further conserve encoding space, most registers are expressed in
2781:
810:
12432:
11251:
10497:
10457:
10300:
9879:
9528:
9390:
9115:
8975:
7041:"Processors — What mode of addressing do the Intel Processors use?"
7018:
6782:
6540:"The cloud beyond x86: How old architectures are making a comeback"
5946:
Prior to 2005, x86 architecture processors were unable to meet the
5839:
5822:
5673:
5484:
5428:
5307:
5178:
5170:
5018:
4289:), and a fourth task register (TR) is used for task switching. The
3005:
2977:
2885:
2699:
2653:
2444:
2428:
2154:
2051:
1953:
1916:
1824:
1704:
1675:
1416:
1356:
1298:
765:
737:
706:
605:. At the high end, x86 continues to dominate computation-intensive
479:
372:
313:
7168:. Intel Corporation. 1986. 2.5.3.2 EFFECTIVE-ADDRESS COMPUTATION.
6894:"Zhaoxin Preparing Linux Kernel Support For 7-Series Centaur CPUs"
6064:
prefix, while new instructions and extended operands for existing
5367:
refer to it either as "x86-64", its variant "x86_64", or "amd64".
2945:
2796:
The x86 architecture is a variable instruction length, primarily "
11241:
11199:
10332:
10230:
10068:
10051:
10011:
9932:
9913:
9891:
9591:
9586:
9125:
9120:
9010:
8706:
8589:
8572:
8555:
7811:"IBM WebSphere Application Server 64-bit Performance Demystified"
6353:
6326:
6126:
6110:
6073:
5967:
5835:
5814:
5790:
5778:
5773:
5633:
5521:
entertainment applications and was designed to improve the CPU's
5461:
instruction set designed by Intel and introduced in 1997 for the
5248:
4489:
4434:
4416:
2889:
2706:
2672:
2614:
2548:
AMD meanwhile designed and manufactured the advanced but delayed
2501:
2420:
2412:
2213:
2136:
2132:
2128:
2124:
2088:
2084:
2076:
2072:
2018:
2014:
1900:
1896:
1796:
1792:
1679:
1593:
1589:
1539:
1402:
1318:
1013:
781:
760:
designs used in some relatively low-power and low-cost segments.
471:
380:
163:
8214:, an interactive reference tool for Intel intrinsic instructions
7576:"SIMD programming illustrated using Intel's MMX instruction set"
6793:"Intel 64 and IA-32 Architectures Optimization Reference Manual"
4584:
and adding an immediate byte value to it produces the efficient
2712:
559:. Colloquially, their names were "186", "286", "386" and "486".
487:
11256:
11221:
11186:
10255:
10021:
9874:
9859:
9568:
9400:
8995:
8963:
8957:
8809:
8632:
8425:
7980:"Intel adds fresh x86 and vector instructions for future chips"
7549:
Embedded Pentium® Processor Family Technical Information Center
6376:
6115:
6047:
Three-operand instruction formats for many integer instructions
5909:
5867:, which offers some protection against security bugs caused by
5864:
5843:
5756:
5681:
x86-64 processors PAE mode must be active before the switch to
5677:
5609:
5530:
5526:
5512:
5232:
5217:
4588:
4386:
4372:
4187:
For a description of the general notion of a CPU register, see
2852:. This microprocessor subsequently developed into the extended
2828:
2749:
2645:
2641:
2610:
2606:
2594:
2587:
2564:
2553:
2464:
2436:
2332:
1774:
1558:
1514:
1493:
1412:
1384:
1369:
1352:
1341:
1333:
1219:
1215:
1209:
990:
733:
729:
702:
590:
579:
460:
384:
341:
317:
265:
249:
245:
225:
205:
193:
8218:
Intel® 64 and IA-32 Architectures Software Developer's Manuals
7710:"Upgrading And Repairing PCs 21st Edition: Processor Features"
6822:
6820:
6798:. Intel. September 2019. 3.4.2.2 Optimizing for Macro-fusion.
6129:, a competing architecture in the later 32-bit and 64-bit eras
5581:
In 1999, Intel introduced the Streaming SIMD Extensions (SSE)
1967:, very wide VPU (512-bit SSE), LRBni instructions (8× 64-bit)
1786:
netbook or low power smart device processor, P54C core reused
11714:
11246:
11216:
10662:
9819:
9355:
9154:
9130:
8942:
8718:
8656:
8596:
7956:
6767:
6240:
6236:
6232:
6120:
6105:
5913:
5892:
5810:
5782:
5568:
5372:
5228:
5093:
and applications software. The SMM code is running in SMRAM.
4341:
4337:
3037:
for 16-bit processor modes can be summarized by the formula:
2853:
2753:
2738:
2734:
2683:
2579:
2568:
2518:
2497:
2424:
2374:
2192:
1751:
1743:
1708:
1667:
1623:
1615:
1525:
1441:-128 core, on-die memory controller, on-die PCI bridge logic
1397:
1115:
1056:
626:
515:
337:
321:
237:
189:
48:
31:
6944:"Zhaoxin Finally Adding "Lujiazui" x86_64 CPU Tuning To GCC"
3022:
translation to convert x86 instructions to the CPU's native
379:
subset of the x86 architecture is therefore fully open. The
12578:
11726:
11646:
11236:
10502:
10167:
9984:
9854:
9832:
9628:
9170:
8700:
8682:
8668:
8662:
8650:
8644:
8550:
8328:
6817:
6274:
6228:
6167:
6123:, a competing architecture in the 16 & early 32bit eras
6069:
5995:
5924:
32-bit and 64-bit RISC architecture as a competitor in the
5599:-handling instructions to boost the performance of Intel's
5576:
5572:
5564:
5560:
5086:
5082:
5038:
5010:
4880:
Note: The ?IL registers are only available in 64-bit mode.
4818:
Note: The ?PL registers are only available in 64-bit mode.
3023:
2849:
2601:
was significantly faster than the Pentium on integer code.
2598:
2560:
2549:
2530:
2526:
2493:
2483:
2479:
2478:
market, real quantities started to appear around 1990 with
2196:
1812:
1671:
1455:
1322:
656:
652:
637:
622:
456:
452:
376:
333:
329:
309:
289:
241:
233:
221:
197:
146:
142:
8032:"Intel's New AVX10 Brings AVX-512 Capabilities to E-Cores"
7134:. Intel Corporation. 1983. 2.4.3 Memory Addressing Modes.
4509:
CL/CH/CX/ECX/RCX: Counter (for use with loops and strings)
4336:
The 80386 had an optional floating-point coprocessor, the
2733:(like its first implementation) but Intel later dubbed it
2586:(FPU) and (the then crucial) pin-compatibility, while the
1851:
octa-core, CMT(Clustered Multi-Thread), FMA, OpenCL, AM3+
11156:
10543:
List of Intel graphics processing units (2013 or earlier)
9761:
7514:"Intel's Yamhill Technology: x86-64 compatible |Geek.com"
6450:"AMD introduces 64-bit Opteron Chip (ESJ) (news article)"
6007:
5669:
5500:
5397:
5314:
4208:
4171:
pointing to the most recently pushed item. There are 256
4152:
2773:
2687:
2609:
set of processors, which gave way to the very successful
2602:
2557:
2556:), which, internally, was closely based on AMD's earlier
2514:
2452:
2400:
2396:
2388:
1755:
1670:(enabled on selected models of Pentium 4 and Celeron D),
1141:
448:
437:
430:
185:
8911:
6737:"AMD Discloses New Technologies At Microprocessor Forum"
6027:
5950:– a specification for virtualization created in 1974 by
4598:
Modern compilers benefited from the introduction of the
2605:
later managed to grow into a serious contender with the
784:
architecture. However, the continuous refinement of x86
8103:"Intel APX Code Begins Landing Within The GCC Compiler"
6252:
Such a system also contained the usual mix of standard
4518:
SP/ESP/RSP: Stack pointer for top address of the stack.
2791:
2383:
List of former IA-32 compatible processor manufacturers
522:
microprocessor and its 8-bit-external-bus variant, the
387:
subset of the x86 architecture is therefore fully open.
4401:, used in shared libraries in some operating systems.
4041:
3984:
3938:
3927:
3881:
3833:
3709:
3575:
3564:
3413:
3297:
3184:
3141:
3130:
3048:
1328:
on-package (Pentium II) or on-die (Celeron) L2 Cache,
7102:. Intel Corporation. October 1979. p. 2-68.
6467:. Prentice-Hall of India. p. 402 (Section 19.1,
5243:
x86 processors that support protected mode boot into
3820:
3295:
3046:
1462:(Northwood), NetBurst, quad-pumped bus, Trace Cache,
6864:"Zet: The x86 (IA-32) open implementation: Overview"
6701:
Stanley Mazor (January–March 2010). "Intel's 8086".
6672:"Birth of a Standard: The Intel 8086 Microprocessor"
5321:
extension of the x86 architecture which they called
5033:
series and later start up in real mode at power-on;
2980:
has four threads per core). Some Intel CPUs support
2705:
However, in 2014 the Shanghai-based Chinese company
2094:
SoC, on-chip Broadwell-U PCH-LP (Multi-chip module)
1986:, game console and low power smart device processor
5650:
5412:hardware in the form of a series of floating-point
2202:AMD's implementation of SMT, on-chip multiple dies
835:. Unsourced material may be challenged and removed.
8155:
7816:. IBM Corporation. September 6, 2007. p. 14.
7453:. Intel. 1983. Section 1.2, "Modes of Operation".
6829:"The microarchitecture of Intel, AMD and VIA CPUs"
5487:), one may use it to contain two 32-bit integers (
5317:published a (nearly) complete specification for a
4515:BL/BH/BX/EBX/RBX: Base index (for use with arrays)
4117:
3800:
3275:
7915:Adams, Keith; Agesen, Ole (October 21–25, 2006).
7881:
7744:AMD Athlon™ Processor x86 Code Optimization Guide
6348:Intel abandoned its "x86" naming scheme with the
5904:) to fast gaming desktop computers (for example,
4606:) that allows registers to be treated uniformly (
4305:Registers available in the x86-64 instruction set
1285:μ-op translation, conditional move instructions,
12668:
10673:Intel International Science and Engineering Fair
7884:"Why Intel's Prescott will use AMD64 extensions"
4454:
10383:Intel Corporation Inc. v CPM United Kingdom Ltd
7803:
7704:
7702:
7605:Sexton, Michael Justin Allen (April 21, 2017).
9567:
8740:(ABM: 2007, BMI1: 2012, BMI2: 2013, TBM: 2012)
8491:
7657:"Intel's MMX and AMD's 3DNow! SIMD Operations"
7218:
5838:, capable of addressing much more than 4
5220:, a mechanism making it possible to use paged
4429:Advanced Vector Extensions § New features
2365:
1915:Internal Ring connection, decoded μ-op cache,
678:Although the 8086 was primarily developed for
10739:
9196:
8927:
8477:
8243:
7573:
6995:"Envisioning a Simplified Intel Architecture"
6700:
2896:processors, use 512-bit wide SIMD registers.
2713:From 16-bit and 32-bit to 64-bit architecture
2005:, low/ultra-low power smart device processor
574:and general-purpose computers used x86 chips
526:. The 8086 was introduced in 1978 as a fully
7775:
7699:
7545:"Programming With the Intel MMX™ Technology"
7202:. Intel Corporation. March 2018. Chapter 3.
7192:
7190:
5958:. However, both proprietary and open-source
5408:Early x86 processors could be extended with
4321:" (for "extended") to the register names in
3014:used a completely different method in their
2597:had very good Pentium compatibility and the
2504:brand name (which, unlike numbers, could be
1742:Monolithic quad-core (X4)/triple-core (X3),
11744:Computer performance by orders of magnitude
10373:Intel Corp. v. Advanced Micro Devices, Inc.
10363:Advanced Micro Devices, Inc. v. Intel Corp.
8084:"APX is Biggest x86 Addition Since 64 Bits"
7914:
7229:. San Francisco, CA: No Starch Press, Inc.
5542:which would otherwise not know about them.
5029:at the hardware level. All x86 CPUs in the
4546:IP/EIP/RIP: Instruction pointer. Holds the
4433:SIMD registers YMM0–YMM15 (YMM0–YMM31 when
4415:SIMD registers XMM0–XMM15 (XMM0–XMM31 when
4224:, and may also be used for array indexing.
2668:, its first "in-order" processor after the
413:64-bit: 16 GPRs, including RBP and RSP
80:1978 (16-bit), 1985 (32-bit), 2003 (64-bit)
10753:
10746:
10732:
9203:
9189:
9041:Advanced Programmable Interrupt Controller
8934:
8920:
8484:
8470:
8250:
8236:
7728:
7285:"FSTSW/FNSTSW — Store x87 FPU Status Word"
6053:Optimized register save/restore operations
5916:), and even dominate large supercomputing
5595:processor, SSE3 added specific memory and
5431:integral part of the x86 instruction set.
4619:General Purpose Registers (A, B, C and D)
4411:Streaming SIMD Extensions § Registers
2899:
2835:
2620:There were also other contenders, such as
1293:, 3-way x86 superscalar, superscalar FPU,
410:32-bit: 8 GPRs, including EBP and ESP
10653:List of mergers and acquisitions by Intel
8169:
7839:
7734:
7580:Journal of Computing Sciences in Colleges
7224:
7187:
6574:"Whatever Happened to the Intel iAPX432?"
6056:A 64-bit absolute direct jump instruction
5962:hypervisor products were developed using
5743:Learn how and when to remove this message
5153:Learn how and when to remove this message
5070:
4997:Learn how and when to remove this message
4447:Advanced Vector Extensions § AVX-512
895:Learn how and when to remove this message
455:units, later implementations extended to
10643:List of semiconductor fabrication plants
7882:Charlie Demerjian (September 26, 2003).
7539:
7537:
7535:
7129:"iAPX 286 Programmer's Reference Manual"
6763:"Microsoft to End Intel Itanium Support"
5760:
4740:Segment Registers (C, D, S, E, F and G)
4300:
2960:processors) and AMD CPUs (starting from
2369:
486:
478:
470:
436:32-bit: optional separate or integrated
10368:High-Tech Employee Antitrust Litigation
10281:Process–architecture–optimization model
8800:(2008); ARMv8 also has AES instructions
8257:
7952:"Advanced Performance Extensions (APX)"
7949:
7261:. Cs.virginia.edu. September 11, 2013.
7047:from the original on September 11, 2014
7011:
6975:from the original on September 11, 2014
6703:IEEE Annals of the History of Computing
6669:
6537:
6279:Intel Advanced Performance Architecture
4220:). The registers SI, DI, BX and BP are
2648:processors, which were designed by the
2216:'s first brand new x86-64 architecture
2183:Integrated FCH on die, SoC, AM4 socket
621:In the 1980s and early 1990s, when the
576:before the PC-compatible market started
566:, as this implies a multitude of other
27:Family of instruction set architectures
14:
12677:Computer-related introductions in 1978
12669:
8202:Why Intel can't seem to retire the x86
8029:
7854:AMD64 Architecture Programmer's Manual
7631:Shimpi, Anand Lal (October 29, 1998).
7630:
7604:
7175:from the original on December 28, 2018
6874:from the original on February 11, 2018
6805:from the original on February 14, 2020
6631:
6629:
6580:from the original on November 25, 2017
6516:
6491:
6447:
6294:late 1981 to early 1984, approximately
5391:
4474:(CR0 through 4, CR8 for 64-bit only),
2856:, and later processors incorporated a
10727:
9184:
9086:Intel Display Power Saving Technology
8915:
8465:
8231:
7823:from the original on January 25, 2022
7574:Krishnaprasad, S. (January 1, 2004).
7532:
7291:from the original on January 25, 2022
7206:from the original on January 26, 2012
7077:from the original on December 2, 2013
6492:Mhatre, Swapneel Chandrakant (2012).
6436:
6283:Intel Advanced Processor Architecture
6173:Transient execution CPU vulnerability
6028:APX (Advanced Performance Extensions)
4052:
4049:
4046:
3956:
3953:
3950:
3899:
3896:
3893:
3858:
3855:
3841:
3838:
3688:
3685:
3682:
3671:
3668:
3665:
3654:
3651:
3648:
3637:
3634:
3631:
3620:
3617:
3614:
3603:
3600:
3597:
3586:
3583:
3580:
3543:
3540:
3537:
3526:
3523:
3520:
3509:
3506:
3503:
3492:
3489:
3486:
3475:
3472:
3469:
3458:
3455:
3452:
3441:
3438:
3435:
3424:
3421:
3418:
3390:
3387:
3373:
3370:
3356:
3353:
3339:
3336:
3322:
3319:
3305:
3302:
3206:
3203:
3192:
3189:
3163:
3160:
3149:
3146:
3107:
3104:
3090:
3087:
3073:
3070:
3056:
3053:
2447:started to design or manufacture x86
2313:
2281:
2163:
2031:
1933:
1883:
1770:
1663:
916:
716:Modern x86 is relatively uncommon in
11715:Floating-point operations per second
9210:
8055:
7977:
7931:from the original on August 20, 2010
7746:(Revision K ed.). p. 250.
7633:"AMD's K6-2 350: Something to do..."
7494:from the original on August 28, 2017
7460:from the original on August 28, 2017
7141:from the original on August 28, 2017
6760:
6651:from the original on August 28, 2017
6614:from the original on August 28, 2017
6592:
6550:from the original on August 19, 2021
6538:Brandon, Jonathan (April 15, 2015).
6148:List of Intel CPU microarchitectures
5817:processor, initially aiming for the
5725:adding citations to reliable sources
5696:
5664:or PAE was first added in the Intel
5262:
5135:adding citations to reliable sources
5106:
4979:adding citations to reliable sources
4950:
4486:(MSRs, appearing with the Pentium).
2916:. These modern x86 designs are thus
2844:with 80-bit internal registers, the
2820:arithmetic and memory addresses (or
2792:Basic properties of the architecture
2721:has twice been extended to a larger
2387:At various times, companies such as
2210:Zhaoxin WuDaoKou (KX-5000, KH-20000)
833:adding citations to reliable sources
804:
10388:Silvaco Data Systems v. Intel Corp.
9141:Performance acceleration technology
8207:32/64-bit x86 Instruction Reference
8100:
8003:
7753:from the original on April 13, 2017
7358:from the original on August 9, 2016
7265:from the original on March 24, 2020
7162:80386 Programmer's Reference Manual
6841:from the original on March 22, 2019
6626:
6462:
5255:, may place the processor into the
5059:Unreal mode is used by some 16-bit
4132:) simplifies the implementation of
3029:
1019:8086-2 ISA, embedded (80186/80188)
24:
10628:Intel Outstanding Researcher Award
10488:Mac transition to Intel processors
10483:Intel Foundation Achievement Award
8450:
8149:
7863:from the original on April 4, 2024
7426:from the original on April 2, 2013
7392:from the original on April 2, 2013
7328:from the original on April 2, 2013
7109:from the original on April 4, 2018
6571:
6448:Swoyer, Stephen (April 24, 2003).
4935:
4550:, the address of next instruction.
4110:
4107:
4104:
4101:
4098:
4095:
4092:
4089:
4086:
4083:
4080:
4077:
3793:
3790:
3787:
3784:
3781:
3778:
3775:
3772:
3769:
3766:
3763:
3760:
3268:
3265:
3262:
3259:
3256:
3253:
3250:
3247:
3244:
3241:
3238:
3235:
1411:MMX+, 3DNow!+, double-pumped bus,
667:(for single-board computers), and
25:
12703:
10698:Supervisor Mode Access Prevention
10648:List of Intel manufacturing sites
8195:
8081:
7950:Winkel, Sebastian; Agron, Jason.
7778:"Will Intel abandon the Itanium?"
7419:. Intel. March 2013. Chapter 10.
7012:Larabel, Michael (May 20, 2023).
6743:. October 5, 1999. Archived from
6517:Alcorn, Paul (February 9, 2022).
6375:Some "CISC" designs, such as the
5935:
5096:
4884:Instruction Pointer Register (I)
4482:(TR3 through 7; 80486 only), and
4397:), to ease the implementation of
2848:, was developed for the original
2737:when introducing its (unrelated)
2656:, was their first processor with
12641:Semiconductor device fabrication
10296:Intel HD, UHD, and Iris Graphics
8900:Suspended extensions' dates are
7385:. Intel. March 2013. Chapter 9.
7321:. Intel. March 2013. Chapter 8.
6153:List of VIA microprocessor cores
5842:of virtual memory using the new
5701:
5651:Physical Address Extension (PAE)
5111:
4955:
4182:
2768:also use term "x64", while many
2752:in early documents and later as
1437:powered x86 platform processor,
1372:, 3-level cache system (K6-III)
809:
768:(a project originally named the
562:The term is not synonymous with
508:complex instruction set computer
12616:History of general-purpose CPUs
10843:Nondeterministic Turing machine
10678:Regeneron Science Talent Search
10528:Dynamic video memory technology
9384:P6 variant (Enhanced Pentium M)
8120:
8094:
8075:
8049:
8023:
7997:
7971:
7943:
7908:
7875:
7856:. AMD Corporation. March 2024.
7769:
7674:
7649:
7624:
7598:
7567:
7506:
7481:iAPX 286 Programmer's Reference
7472:
7447:iAPX 286 Programmer's Reference
7438:
7404:
7370:
7340:
7306:
7277:
7251:
7153:
7121:
7097:"The 8086 Family User's Manual"
7089:
7059:
7033:
7005:
6987:
6961:
6936:
6911:
6886:
6856:
6826:
6754:
6729:
6694:
6670:Edwards, Benj (June 16, 2008).
6663:
6601:iAPX 286 Programmer's Reference
6565:
6411:
6401:
6391:
6382:
6369:
6360:
6342:
6333:
6320:
6310:
6297:
6288:
6267:
6246:
5948:Popek and Goldberg requirements
5920:, effectively leaving only the
5712:needs additional citations for
5685:, and must remain active while
5539:single-precision floating-point
5201:levels used for hardware-based
5122:needs additional citations for
4966:needs additional citations for
4478:(DR0 through 3, plus 6 and 7),
4147:of eight-bit (or alternatively
3018:x86 compatible CPUs. They used
1869:on-die GPGPU, PCI Express 2.0,
820:needs additional citations for
10796:Deterministic finite automaton
9051:Client Initiated Remote Access
9009:4Group Holdings (50% owned by
8291:Low-level programming language
8030:Alcorn, Paul (July 24, 2023).
7847:"Volume 2: System Programming"
7776:Manek Dubash (July 20, 2006).
6531:
6510:
6485:
6456:
6441:
6430:
6256:support components, including
6221:
6208:
6195:
6076:instructions are encoded with
5966:. Proprietary systems include
5545:
5048:
4309:With the advent of the 32-bit
2463:, ULSI System Technology, and
1496:(Dothan) (Intel Core "Yonah")
780:and the Intel/Hewlett-Packard
732:, although the x86-compatible
713:are using x86-based hardware.
13:
1:
11587:Simultaneous and heterogenous
10538:List of Intel microprocessors
9161:Stable Image Platform Program
8056:Shah, Agam (August 9, 2023).
6424:
5964:software-based virtualization
5386:
4506:AL/AH/AX/EAX/RAX: Accumulator
4455:Miscellaneous/special purpose
2123:(Intel Pentium/Celeron Gold,
1748:Rapid Virtualization Indexing
912:Chronology of x86 processors
800:
512:instruction set architectures
12271:Integrated memory controller
12253:Translation lookaside buffer
11452:Memory dependence prediction
10895:Random-access stored program
10848:Probabilistic Turing machine
9106:Intel system development kit
6761:Burt, Jeff (April 5, 2010).
6469:The x86 family of processors
6465:Computer System Architecture
6000:Kernel-based Virtual Machine
5643:, and shuffle instructions.
5436:IEEE floating-point standard
5286:
4940:
4760:Pointer Registers (S and B)
4613:
4467:) and a task register (TR).
4140:in some operating systems).
4130:instruction pointer register
2942:memory dependence prediction
2719:instruction set architecture
2525:and then the very efficient
1225:Discrete microarchitecture (
709:, including a large list of
7:
11727:Synaptic updates per second
10623:Intel Mobile Communications
10548:I/O Acceleration Technology
9091:Intel Modular Server System
9046:Cache Acceleration Software
7735:AMD, Inc. (February 2002).
7682:"3DNow!™ Technology Manual"
6083:
5863:x86-64 also introduced the
5495:) or eight 8-bit integers (
5425:Numeric Processor eXtension
4459:x86 processors that have a
2966:simultaneous multithreading
2366:Designers and manufacturers
1887:low power smart device APU
1877:AMD APU C, E and Z Series (
794:semiconductor manufacturing
616:
585:As of June 2022, most
10:
12708:
12131:Heterogeneous architecture
11053:Orthogonal instruction set
10823:Alternating Turing machine
10811:Quantum cellular automaton
10688:Single-chip Cloud Computer
9061:Flexible Display Interface
7071:Intel VTune Amplifier 2013
6496:. Jaico Publishing House.
6020:
5939:
5819:high-performance computing
5754:
5662:Physical Address Extension
5657:Physical Address Extension
5654:
5630:Advanced Vector Extensions
5627:
5554:
5510:
5450:
5401:
5395:
5371:systems use "amd64" while
5290:
5266:
5100:
5074:
5052:
4944:
4822:Index Registers (S and D)
4496:
4444:
4440:
4426:
4422:
4408:
4404:
4370:
4186:
2882:Advanced Vector Extensions
2800:" design with emphasis on
2380:
2360:
1562:
1557:
1081:
1078:
1055:
578:, some of them before the
429:16-bit: optional separate
29:
12621:Microprocessor chronology
12608:
12584:Dynamic frequency scaling
12557:
12493:
12431:
12385:
12337:
12292:
12212:
12139:
12108:
12013:
11934:
11898:
11852:
11752:
11739:Cache performance metrics
11678:
11612:
11562:
11473:
11464:
11437:
11392:
11359:
11331:
11322:
11142:
11045:
11034:
10905:
10761:
10693:Software Guard Extensions
10683:Simple Firmware Interface
10475:
10424:
10403:
10396:
10355:
10268:
10208:
10020:
9818:
9760:
9711:
9678:
9648:
9641:
9560:
9499:
9399:
9354:
9345:
9218:
9018:
9004:
8949:
8941:
8898:
8867:
8843:
8781:
8753:
8728:
8612:
8502:
8374:
8347:Microsoft Macro Assembler
8314:
8263:
7607:"The History Of AMD CPUs"
6638:iAPX 86, 88 User's Manual
6158:List of x86 manufacturers
5984:VMware Workstation Player
5889:IBM Power microprocessors
5799:IBM Power microprocessors
5692:
5557:Streaming SIMD Extensions
5506:
5491:), four 16-bit integers (
5348:, and later rebranded it
5013:and later x86-compatible
4928:
4926:
4921:
4919:
4914:
4871:
4866:
4864:
4859:
4857:
4852:
4809:
4804:
4802:
4797:
4795:
4790:
4752:
4730:
4725:
4723:
4718:
4716:
4711:
4668:
4663:
4661:
4656:
4654:
4649:
4399:position-independent code
4366:
4361:Streaming SIMD Extensions
4296:
4194:
4134:position-independent code
2377:, released by AMD in 1991
2353:
2348:
2345:
2342:
2339:
2259:
2242:
2180:(AMD (Pro) A6/A8/A10/A12)
2141:
1998:
1971:
1923:
1865:
1855:
1847:
1830:hardware-based encryption
1807:QuickPath, on-chip GMCH (
1761:
1750:(RVI), HyperTransport 3,
1738:
1622:, on-die dual-core (X2),
1611:
1567:
1544:
1469:
1451:
1422:
1376:
1277:
1257:
1154:
1084:
1060:
1001:
979:
976:
973:
955:
952:
930:
925:
922:
919:
663:(for operating systems),
444:units in later processors
420:
398:
391:
363:
181:
138:
128:
116:
106:
96:
84:
76:
58:
44:
12636:Hardware security module
11979:Digital signal processor
11956:Graphics processing unit
11768:Graphics processing unit
8697:(FMA4: 2011, FMA3: 2012)
8276:Comparison of assemblers
7687:. Advanced Micro Devices
6189:
6143:List of Intel processors
6096:x86 instruction listings
4484:model-specific registers
4149:32 K-word of 16-bit
2842:floating-point processor
1996:(Atom, Celeron, Pentium)
1859:AMD APU A and E Series (
1678:(Pentium 4 6x2), socket
756:are examples of 32- and
705:list. A large amount of
694:, servers, and most new
112:Variable (1 to 15 bytes)
12589:Dynamic voltage scaling
12372:Memory address register
12266:Branch target predictor
12230:Address generation unit
11973:Physics processing unit
11762:Central processing unit
11721:Transactions per second
11709:Instructions per second
11632:Array processing (SIMT)
10776:Stored-program computer
10493:Intel Architecture Labs
8755:Compressed instructions
7551:. Intel. Archived from
7259:"Guide to x86 Assembly"
6546:. Business Cloud News.
6101:x86 memory segmentation
6035:GNU Compiler Collection
5187:Global Descriptor Table
4359:, Intel added a 32-bit
4163:in memory supported by
2900:Current implementations
2836:Floating point and SIMD
2508:) for their new set of
1940:, Bulldozer based APU,
514:initially developed by
177:: added 1 GB pages
166:: added 4 MB pages
12395:Hardwired control unit
12277:Memory management unit
12242:Memory management unit
11991:Secure cryptoprocessor
11985:Tensor Processing Unit
11967:Vision processing unit
11701:Cycles per instruction
11695:Instructions per cycle
11642:Associative processing
11333:Instruction pipelining
10755:Processor technologies
9379:P6 variant (Pentium M)
9096:Intel Quick Sync Video
9056:Direct Media Interface
8212:Intel Intrinsics Guide
6644:. Intel. August 1981.
6273:The actual meaning of
6138:List of AMD processors
6016:
5828:backward compatibility
5802:
5533:series of processors.
5446:
5191:Local Descriptor Table
5077:System Management Mode
5071:System Management Mode
4543:for string operations.
4306:
4119:
3802:
3277:
2964:) are also capable of
2924:, and also capable of
2870:floating-point numbers
2802:backward compatibility
2680:backward compatibility
2461:National Semiconductor
2378:
492:
484:
476:
172:: 4 KB→2 MB)
12478:Sum-addressed decoder
12224:Arithmetic logic unit
11351:Classic RISC pipeline
11305:Epiphany architecture
11152:Motorola 68000 series
10558:IM Flash Technologies
10553:IA-32 Execution Layer
10533:Intel Extreme Masters
10523:Intel Developer Forum
10378:Intel Corp. v. Hamidi
9111:Intel Upgrade Service
8365:Open Watcom Assembler
8306:x86 assembly language
6682:on September 26, 2010
6218:laptop, for instance.
6091:x86 assembly language
5972:Parallels Workstation
5764:
5453:MMX (instruction set)
5402:Further information:
4604:scale-index-base byte
4371:Further information:
4323:x86 assembly language
4304:
4120:
3803:
3278:
2930:speculative execution
2880:processors added the
2731:the i386 architecture
2662:speculative execution
2543:speculative execution
2381:Further information:
2373:
2346:Prominent CPU models
1626:(Athlon 64 Orleans),
1291:speculative execution
923:Prominent CPU models
720:, however, and small
711:x86 operating systems
538:microprocessor, with
490:
482:
474:
12599:Performance per watt
12177:replacement policies
11843:Package on a package
11733:Performance per watt
11637:Pipelined processing
11407:Tomasulo's algorithm
11212:Clipper architecture
11068:Application-specific
10781:Finite-state machine
10633:Intel SHA extensions
8845:Transactional memory
8446:Instruction listings
7788:on February 19, 2011
7520:on September 5, 2012
7348:"Intel 80287 family"
6870:. November 4, 2013.
6715:10.1109/MAHC.2010.22
6463:Rao, P.V.S. (2009).
6183:Virtual legacy wires
5992:free and open-source
5721:improve this article
5131:improve this article
4975:improve this article
3818:
3293:
3044:
2982:transactional memory
2888:processors, and the
2700:DM&P Electronics
1817:Extended Page Tables
1707:(<<== EM64T),
829:improve this article
564:IBM PC compatibility
12631:Digital electronics
12284:Instruction decoder
12236:Floating-point unit
11890:Soft microprocessor
11837:System in a package
11412:Reservation station
10942:Transport-triggered
10613:Intel Compute Stick
10608:Intel Cluster Ready
10513:Convera Corporation
8441:Calling conventions
8341:High Level Assembly
8258:x86 assembly topics
8180:10.1109/MC.2005.176
7896:on October 10, 2009
6023:AES instruction set
5777:systems (including
5404:Floating-point unit
5392:Floating-point unit
5365:Linux distributions
5363:operating systems.
5359:in the Windows and
4885:
4823:
4761:
4741:
4682:
4620:
4554:Segment registers:
4395:instruction pointer
4351:added eight 64-bit
2858:backward compatible
2770:Linux distributions
2640:' energy efficient
2584:floating-point unit
2563:design; similar to
2455:processors include
1266:, μ-op translation)
1105:(pipelining, cache)
913:
540:memory segmentation
447:64-bit: integrated
41:
12687:IBM PC compatibles
12503:Integrated circuit
12347:Processor register
12001:Baseband processor
11346:Operand forwarding
10806:Cellular automaton
10668:Intel PRO/Wireless
10178:Sandy Bridge-based
9347:Microarchitectures
9332:Microarchitectures
9031:Accounts & SSO
8991:Wind River Systems
8436:Processor register
8101:Larabel, Michael.
7716:. October 31, 2013
6747:on March 2, 2000.
5988:Windows Virtual PC
5980:VMware Workstation
5960:x86 virtualization
5956:Robert P. Goldberg
5942:x86 virtualization
5803:
4883:
4821:
4759:
4739:
4680:
4618:
4377:Starting with the
4307:
4189:Processor register
4115:
4066:
4059:
4024:
4013:
3970:
3913:
3868:
3798:
3749:
3738:
3695:
3550:
3400:
3273:
3224:
3213:
3170:
3117:
2622:Centaur Technology
2472:microarchitectures
2379:
1929:Bulldozer, Trinity
1927:AMD APU A Series (
1502:Transmeta Efficeon
911:
786:microarchitectures
688:midrange computers
493:
485:
477:
39:
12664:
12663:
12553:
12552:
12172:Instruction cache
12162:Scratchpad memory
12009:
12008:
11996:Network processor
11925:Network on a chip
11880:Ultra-low-voltage
11831:Multi-chip module
11674:
11673:
11460:
11459:
11447:Branch prediction
11424:Register renaming
11318:
11317:
11300:VISC architecture
11122:Quantum computing
11117:VISC architecture
10999:Secondary storage
10915:Microarchitecture
10875:Register machines
10721:
10720:
10713:Timeline of Intel
10583:The Beauty Inside
10471:
10470:
10351:
10350:
10264:
10263:
9637:
9636:
9556:
9555:
9166:Virtual 8086 mode
9081:Intel Clear Video
8981:Recon Instruments
8909:
8908:
8459:
8458:
8353:Netwide Assembler
8271:Assembly language
7236:978-1-59327-913-4
6739:(Press release).
6503:978-81-8495-325-1
6478:978-81-203-3594-3
6203:microarchitecture
6163:Interrupt request
6133:Microarchitecture
5753:
5752:
5745:
5523:vector processing
5481:packed data types
5276:virtual 8086 mode
5269:Virtual 8086 mode
5263:Virtual 8086 mode
5203:computer security
5163:
5162:
5155:
5091:operating systems
5061:operating systems
5023:memory protection
5007:
5006:
4999:
4933:
4932:
4878:
4877:
4816:
4815:
4757:
4756:
4737:
4736:
4678:
4677:
4573:GS: Extra data #3
4570:FS: Extra data #2
4541:Destination index
4472:control registers
4222:address registers
4207:have fourteen 16-
4165:computer hardware
3875:
3872:
3407:
3404:
3124:
3121:
2938:register renaming
2934:branch prediction
2539:register renaming
2476:personal computer
2358:
2357:
2354:Notable features
1980:(Athlon, Sempron)
1699:Celeron Dual-Core
1694:Pentium Dual-Core
1530:64-bit Transition
1484:Pentium Dual-Core
1377:Enhanced Platform
1287:dynamic execution
1252:dynamic execution
931:Notable features
905:
904:
897:
879:
601:are dominated by
568:computer hardware
506:) is a family of
469:
468:
158:: 4 KB pages
16:(Redirected from
12699:
12692:X86 architecture
12626:Processor design
12518:Power management
12400:Instruction unit
12261:Branch predictor
12210:
12209:
11908:System on a chip
11850:
11849:
11690:Transistor count
11614:Flynn's taxonomy
11471:
11470:
11329:
11328:
11132:Addressing modes
11043:
11042:
10989:Memory hierarchy
10853:Hypercomputation
10771:Abstract machine
10748:
10741:
10734:
10725:
10724:
10708:Intel Tera-Scale
10590:The Power Inside
10401:
10400:
10183:Ivy Bridge-based
9774:8/16-bit databus
9646:
9645:
9565:
9564:
9561:Current products
9352:
9351:
9212:Intel processors
9205:
9198:
9191:
9182:
9181:
8936:
8929:
8922:
8913:
8912:
8730:Bit manipulation
8486:
8479:
8472:
8463:
8462:
8252:
8245:
8238:
8229:
8228:
8191:
8173:
8144:
8143:
8141:
8139:
8124:
8118:
8117:
8115:
8113:
8098:
8092:
8091:
8079:
8073:
8072:
8070:
8068:
8053:
8047:
8046:
8044:
8042:
8027:
8021:
8020:
8018:
8016:
8004:Bonshor, Gavin.
8001:
7995:
7994:
7992:
7990:
7975:
7969:
7968:
7966:
7964:
7947:
7941:
7940:
7938:
7936:
7930:
7923:
7912:
7906:
7905:
7903:
7901:
7892:. Archived from
7879:
7873:
7872:
7870:
7868:
7862:
7851:
7843:
7837:
7836:
7830:
7828:
7822:
7815:
7807:
7801:
7800:
7795:
7793:
7784:. Archived from
7773:
7767:
7766:
7760:
7758:
7752:
7741:
7732:
7726:
7725:
7723:
7721:
7706:
7697:
7696:
7694:
7692:
7686:
7678:
7672:
7671:
7669:
7667:
7653:
7647:
7646:
7644:
7642:
7628:
7622:
7621:
7619:
7617:
7602:
7596:
7595:
7571:
7565:
7564:
7562:
7560:
7555:on July 25, 2003
7541:
7530:
7529:
7527:
7525:
7516:. Archived from
7510:
7504:
7503:
7501:
7499:
7493:
7486:
7476:
7470:
7469:
7467:
7465:
7459:
7452:
7442:
7436:
7435:
7433:
7431:
7425:
7418:
7408:
7402:
7401:
7399:
7397:
7391:
7384:
7374:
7368:
7367:
7365:
7363:
7344:
7338:
7337:
7335:
7333:
7327:
7320:
7310:
7304:
7303:
7298:
7296:
7281:
7275:
7274:
7272:
7270:
7255:
7249:
7248:
7222:
7216:
7215:
7213:
7211:
7194:
7185:
7184:
7182:
7180:
7174:
7167:
7157:
7151:
7150:
7148:
7146:
7140:
7133:
7125:
7119:
7118:
7116:
7114:
7108:
7101:
7093:
7087:
7086:
7084:
7082:
7063:
7057:
7056:
7054:
7052:
7037:
7031:
7030:
7028:
7026:
7009:
7003:
7002:
6991:
6985:
6984:
6982:
6980:
6965:
6959:
6958:
6956:
6954:
6948:www.phoronix.com
6940:
6934:
6933:
6931:
6929:
6915:
6909:
6908:
6906:
6904:
6898:www.phoronix.com
6890:
6884:
6883:
6881:
6879:
6860:
6854:
6853:
6848:
6846:
6840:
6833:
6824:
6815:
6814:
6812:
6810:
6804:
6797:
6789:
6780:
6779:
6777:
6775:
6758:
6752:
6751:
6733:
6727:
6726:
6698:
6692:
6691:
6689:
6687:
6678:. Archived from
6667:
6661:
6660:
6658:
6656:
6650:
6643:
6633:
6624:
6623:
6621:
6619:
6613:
6606:
6596:
6590:
6589:
6587:
6585:
6572:Dvorak, John C.
6569:
6563:
6562:
6557:
6555:
6535:
6529:
6528:
6514:
6508:
6507:
6489:
6483:
6482:
6460:
6454:
6453:
6445:
6439:
6438:
6434:
6419:
6415:
6409:
6405:
6399:
6395:
6389:
6386:
6380:
6373:
6367:
6364:
6358:
6346:
6340:
6337:
6331:
6324:
6318:
6314:
6308:
6301:
6295:
6292:
6286:
6271:
6265:
6250:
6244:
6225:
6219:
6212:
6206:
6199:
5994:systems include
5748:
5741:
5737:
5734:
5728:
5705:
5697:
5622:double precision
5618:single precision
5591:revision of the
5550:
5549:
5419:with names like
5327:embedded systems
5304:database engines
5300:video processing
5279:, also known as
5253:read-only memory
5183:protected memory
5181:, and providing
5173:and addressable
5158:
5151:
5147:
5144:
5138:
5115:
5107:
5063:and some 32-bit
5002:
4995:
4991:
4988:
4982:
4959:
4951:
4886:
4882:
4824:
4820:
4762:
4758:
4742:
4738:
4683:
4679:
4621:
4617:
4273:
4170:
4158:
4150:
4146:
4138:shared libraries
4124:
4122:
4121:
4116:
4114:
4113:
4071:
4070:
4064:
4060:
4056:
4055:
4036:
4033:
4029:
4028:
4022:
4018:
4017:
3975:
3974:
3960:
3959:
3929:
3918:
3917:
3903:
3902:
3873:
3870:
3869:
3862:
3861:
3845:
3844:
3828:
3807:
3805:
3804:
3799:
3797:
3796:
3754:
3753:
3747:
3743:
3742:
3700:
3699:
3692:
3691:
3675:
3674:
3658:
3657:
3641:
3640:
3624:
3623:
3607:
3606:
3590:
3589:
3566:
3555:
3554:
3547:
3546:
3530:
3529:
3513:
3512:
3496:
3495:
3479:
3478:
3462:
3461:
3445:
3444:
3428:
3427:
3405:
3402:
3401:
3394:
3393:
3377:
3376:
3360:
3359:
3343:
3342:
3326:
3325:
3309:
3308:
3282:
3280:
3279:
3274:
3272:
3271:
3229:
3228:
3222:
3218:
3217:
3210:
3209:
3196:
3195:
3175:
3174:
3167:
3166:
3153:
3152:
3132:
3122:
3119:
3118:
3111:
3110:
3094:
3093:
3077:
3076:
3060:
3059:
3035:Addressing modes
3030:Addressing modes
2762:Sun Microsystems
2727:embedded systems
2692:VIA Technologies
2638:VIA Technologies
2573:micro-operations
2489:After the fully
1834:power management
1427:Transmeta Crusoe
1147:(486DX), on-die
914:
910:
900:
893:
889:
886:
880:
878:
837:
813:
805:
718:embedded systems
680:embedded systems
572:Embedded systems
440:FPU, integrated
42:
38:
21:
18:X86 architecture
12707:
12706:
12702:
12701:
12700:
12698:
12697:
12696:
12667:
12666:
12665:
12660:
12646:Tick–tock model
12604:
12560:
12549:
12489:
12473:Address decoder
12427:
12381:
12377:Program counter
12352:Status register
12333:
12288:
12248:Load–store unit
12215:
12208:
12135:
12104:
12005:
11962:Image processor
11937:
11930:
11900:
11894:
11870:Microcontroller
11860:Embedded system
11848:
11748:
11681:
11670:
11608:
11558:
11456:
11433:
11417:Re-order buffer
11388:
11369:Data dependency
11355:
11314:
11144:
11138:
11037:
11036:Instruction set
11030:
11016:Multiprocessing
10984:Cache hierarchy
10977:Register/memory
10901:
10801:Queue automaton
10757:
10752:
10722:
10717:
10467:
10420:
10392:
10347:
10276:Tick–tock model
10260:
10204:
10193:Broadwell-based
10084:Extreme Edition
10016:
9814:
9756:
9707:
9674:
9633:
9552:
9495:
9395:
9341:
9214:
9209:
9180:
9014:
9000:
8945:
8940:
8910:
8905:
8894:
8863:
8839:
8777:
8749:
8724:
8608:
8498:
8493:Instruction set
8490:
8460:
8455:
8431:Program counter
8376:
8370:
8359:Turbo Assembler
8310:
8286:Instruction set
8259:
8256:
8198:
8171:10.1.1.614.9870
8152:
8150:Further reading
8147:
8137:
8135:
8134:. July 21, 2023
8126:
8125:
8121:
8111:
8109:
8099:
8095:
8082:Byrne, Joseph.
8080:
8076:
8066:
8064:
8054:
8050:
8040:
8038:
8028:
8024:
8014:
8012:
8002:
7998:
7988:
7986:
7978:Robinson, Dan.
7976:
7972:
7962:
7960:
7948:
7944:
7934:
7932:
7928:
7921:
7913:
7909:
7899:
7897:
7880:
7876:
7866:
7864:
7860:
7849:
7845:
7844:
7840:
7826:
7824:
7820:
7813:
7809:
7808:
7804:
7791:
7789:
7774:
7770:
7756:
7754:
7750:
7739:
7733:
7729:
7719:
7717:
7708:
7707:
7700:
7690:
7688:
7684:
7680:
7679:
7675:
7665:
7663:
7655:
7654:
7650:
7640:
7638:
7629:
7625:
7615:
7613:
7603:
7599:
7572:
7568:
7558:
7556:
7543:
7542:
7533:
7523:
7521:
7512:
7511:
7507:
7497:
7495:
7491:
7484:
7478:
7477:
7473:
7463:
7461:
7457:
7450:
7444:
7443:
7439:
7429:
7427:
7423:
7416:
7410:
7409:
7405:
7395:
7393:
7389:
7382:
7376:
7375:
7371:
7361:
7359:
7346:
7345:
7341:
7331:
7329:
7325:
7318:
7312:
7311:
7307:
7294:
7292:
7283:
7282:
7278:
7268:
7266:
7257:
7256:
7252:
7237:
7223:
7219:
7209:
7207:
7196:
7195:
7188:
7178:
7176:
7172:
7165:
7159:
7158:
7154:
7144:
7142:
7138:
7131:
7127:
7126:
7122:
7112:
7110:
7106:
7099:
7095:
7094:
7090:
7080:
7078:
7065:
7064:
7060:
7050:
7048:
7039:
7038:
7034:
7024:
7022:
7010:
7006:
6993:
6992:
6988:
6978:
6976:
6967:
6966:
6962:
6952:
6950:
6942:
6941:
6937:
6927:
6925:
6917:
6916:
6912:
6902:
6900:
6892:
6891:
6887:
6877:
6875:
6862:
6861:
6857:
6844:
6842:
6838:
6834:. p. 107.
6831:
6825:
6818:
6808:
6806:
6802:
6795:
6791:
6790:
6783:
6773:
6771:
6759:
6755:
6735:
6734:
6730:
6699:
6695:
6685:
6683:
6668:
6664:
6654:
6652:
6648:
6641:
6635:
6634:
6627:
6617:
6615:
6611:
6607:. Intel. 1983.
6604:
6598:
6597:
6593:
6583:
6581:
6570:
6566:
6553:
6551:
6536:
6532:
6515:
6511:
6504:
6490:
6486:
6479:
6461:
6457:
6446:
6442:
6435:
6431:
6427:
6422:
6416:
6412:
6406:
6402:
6396:
6392:
6387:
6383:
6374:
6370:
6365:
6361:
6347:
6343:
6338:
6334:
6325:
6321:
6315:
6311:
6302:
6298:
6293:
6289:
6281:, or sometimes
6272:
6268:
6260:, buffers, and
6251:
6247:
6226:
6222:
6213:
6209:
6200:
6196:
6192:
6187:
6178:Tick–tock model
6086:
6030:
6025:
6019:
5952:Gerald J. Popek
5944:
5938:
5869:buffer overruns
5772:(as tracked by
5759:
5749:
5738:
5732:
5729:
5718:
5706:
5695:
5668:, and later by
5659:
5653:
5636:
5628:Main articles:
5583:instruction set
5579:
5555:Main articles:
5553:
5547:
5546:
5515:
5509:
5503:or infinities.
5455:
5449:
5406:
5400:
5394:
5389:
5375:uses "x86_64".
5340:was changed to
5295:
5289:
5271:
5265:
5167:physical memory
5159:
5148:
5142:
5139:
5128:
5116:
5105:
5099:
5079:
5073:
5057:
5051:
5003:
4992:
4986:
4983:
4972:
4960:
4949:
4943:
4938:
4936:Operating modes
4616:
4593:add to register
4548:program counter
4499:
4476:debug registers
4457:
4449:
4443:
4431:
4425:
4419:is supported).
4413:
4407:
4375:
4369:
4299:
4271:
4197:
4192:
4185:
4168:
4156:
4148:
4144:
4076:
4075:
4065:
4062:
4061:
4058:
4057:
4045:
4044:
4040:
4037:
4034:
4031:
4030:
4023:
4020:
4019:
4012:
4011:
4005:
4004:
3998:
3997:
3991:
3990:
3980:
3979:
3969:
3968:
3962:
3961:
3949:
3948:
3945:
3944:
3934:
3933:
3930:
3923:
3922:
3912:
3911:
3905:
3904:
3892:
3891:
3888:
3887:
3877:
3876:
3867:
3866:
3854:
3853:
3850:
3849:
3837:
3836:
3832:
3829:
3822:
3821:
3819:
3816:
3815:
3759:
3758:
3748:
3745:
3744:
3737:
3736:
3730:
3729:
3723:
3722:
3716:
3715:
3705:
3704:
3694:
3693:
3681:
3680:
3677:
3676:
3664:
3663:
3660:
3659:
3647:
3646:
3643:
3642:
3630:
3629:
3626:
3625:
3613:
3612:
3609:
3608:
3596:
3595:
3592:
3591:
3579:
3578:
3571:
3570:
3567:
3560:
3559:
3549:
3548:
3536:
3535:
3532:
3531:
3519:
3518:
3515:
3514:
3502:
3501:
3498:
3497:
3485:
3484:
3481:
3480:
3468:
3467:
3464:
3463:
3451:
3450:
3447:
3446:
3434:
3433:
3430:
3429:
3417:
3416:
3409:
3408:
3399:
3398:
3386:
3385:
3382:
3381:
3369:
3368:
3365:
3364:
3352:
3351:
3348:
3347:
3335:
3334:
3331:
3330:
3318:
3317:
3314:
3313:
3301:
3300:
3296:
3294:
3291:
3290:
3234:
3233:
3223:
3220:
3219:
3212:
3211:
3202:
3201:
3198:
3197:
3188:
3187:
3180:
3179:
3169:
3168:
3159:
3158:
3155:
3154:
3145:
3144:
3137:
3136:
3133:
3126:
3125:
3116:
3115:
3103:
3102:
3099:
3098:
3086:
3085:
3082:
3081:
3069:
3068:
3065:
3064:
3052:
3051:
3047:
3045:
3042:
3041:
3032:
2914:execution units
2902:
2838:
2794:
2715:
2630:Rise Technology
2521:to produce the
2517:partnered with
2500:introduced the
2457:ITT Corporation
2385:
2368:
2363:
2179:
2159:Knights Landing
2122:
2066:
1995:
1979:
1903:
1800:
1795:
1732:
1727:
1697:
1692:
1653:
1601:
1592:
1564:
1563:64-bit Extended
1531:
1482:
1477:
1401:
1396:
1387:
1332:(Pentium III),
1317:
1261:
1240:
1213:
1194:(Pentium MMX),
1158:
1126:
1114:
1012:
901:
890:
884:
881:
838:
836:
826:
814:
803:
726:home appliances
634:instruction set
619:
611:cloud computing
498:(also known as
465:
416:
400:General-purpose
371:processor (and
173:
167:
159:
150:
101:Register–memory
35:
28:
23:
22:
15:
12:
11:
5:
12705:
12695:
12694:
12689:
12684:
12682:Intel products
12679:
12662:
12661:
12659:
12658:
12653:
12651:Pin grid array
12648:
12643:
12638:
12633:
12628:
12623:
12618:
12612:
12610:
12606:
12605:
12603:
12602:
12596:
12591:
12586:
12581:
12576:
12571:
12565:
12563:
12555:
12554:
12551:
12550:
12548:
12547:
12542:
12537:
12532:
12527:
12522:
12521:
12520:
12515:
12510:
12499:
12497:
12491:
12490:
12488:
12487:
12485:Barrel shifter
12482:
12481:
12480:
12475:
12468:Binary decoder
12465:
12464:
12463:
12453:
12448:
12443:
12437:
12435:
12429:
12428:
12426:
12425:
12420:
12412:
12407:
12402:
12397:
12391:
12389:
12383:
12382:
12380:
12379:
12374:
12369:
12364:
12359:
12357:Stack register
12354:
12349:
12343:
12341:
12335:
12334:
12332:
12331:
12330:
12329:
12324:
12314:
12309:
12304:
12298:
12296:
12290:
12289:
12287:
12286:
12281:
12280:
12279:
12268:
12263:
12258:
12257:
12256:
12250:
12239:
12233:
12227:
12220:
12218:
12207:
12206:
12201:
12196:
12191:
12186:
12185:
12184:
12179:
12174:
12169:
12164:
12159:
12149:
12143:
12141:
12137:
12136:
12134:
12133:
12128:
12123:
12118:
12112:
12110:
12106:
12105:
12103:
12102:
12101:
12100:
12090:
12085:
12080:
12075:
12070:
12065:
12060:
12055:
12050:
12045:
12040:
12035:
12030:
12025:
12019:
12017:
12011:
12010:
12007:
12006:
12004:
12003:
11998:
11993:
11988:
11982:
11976:
11970:
11964:
11959:
11953:
11951:AI accelerator
11948:
11942:
11940:
11932:
11931:
11929:
11928:
11922:
11917:
11914:Multiprocessor
11911:
11904:
11902:
11896:
11895:
11893:
11892:
11887:
11882:
11877:
11872:
11867:
11865:Microprocessor
11862:
11856:
11854:
11853:By application
11847:
11846:
11840:
11834:
11828:
11823:
11818:
11813:
11808:
11803:
11798:
11796:Tile processor
11793:
11788:
11783:
11778:
11777:
11776:
11765:
11758:
11756:
11750:
11749:
11747:
11746:
11741:
11736:
11730:
11724:
11718:
11712:
11706:
11705:
11704:
11692:
11686:
11684:
11676:
11675:
11672:
11671:
11669:
11668:
11667:
11666:
11656:
11651:
11650:
11649:
11644:
11639:
11634:
11624:
11618:
11616:
11610:
11609:
11607:
11606:
11601:
11596:
11591:
11590:
11589:
11584:
11582:Hyperthreading
11574:
11568:
11566:
11564:Multithreading
11560:
11559:
11557:
11556:
11551:
11546:
11545:
11544:
11534:
11533:
11532:
11527:
11517:
11516:
11515:
11510:
11500:
11495:
11494:
11493:
11488:
11477:
11475:
11468:
11462:
11461:
11458:
11457:
11455:
11454:
11449:
11443:
11441:
11435:
11434:
11432:
11431:
11426:
11421:
11420:
11419:
11414:
11404:
11398:
11396:
11390:
11389:
11387:
11386:
11381:
11376:
11371:
11365:
11363:
11357:
11356:
11354:
11353:
11348:
11343:
11341:Pipeline stall
11337:
11335:
11326:
11320:
11319:
11316:
11315:
11313:
11312:
11307:
11302:
11297:
11294:
11293:
11292:
11290:z/Architecture
11287:
11282:
11277:
11269:
11264:
11259:
11254:
11249:
11244:
11239:
11234:
11229:
11224:
11219:
11214:
11209:
11208:
11207:
11202:
11197:
11189:
11184:
11179:
11174:
11169:
11164:
11159:
11154:
11148:
11146:
11140:
11139:
11137:
11136:
11135:
11134:
11124:
11119:
11114:
11109:
11104:
11099:
11094:
11093:
11092:
11082:
11081:
11080:
11070:
11065:
11060:
11055:
11049:
11047:
11040:
11032:
11031:
11029:
11028:
11023:
11018:
11013:
11008:
11003:
11002:
11001:
10996:
10994:Virtual memory
10986:
10981:
10980:
10979:
10974:
10969:
10964:
10954:
10949:
10944:
10939:
10934:
10933:
10932:
10922:
10917:
10911:
10909:
10903:
10902:
10900:
10899:
10898:
10897:
10892:
10887:
10882:
10872:
10867:
10862:
10861:
10860:
10855:
10850:
10845:
10840:
10835:
10830:
10825:
10818:Turing machine
10815:
10814:
10813:
10808:
10803:
10798:
10793:
10788:
10778:
10773:
10767:
10765:
10759:
10758:
10751:
10750:
10743:
10736:
10728:
10719:
10718:
10716:
10715:
10710:
10705:
10700:
10695:
10690:
10685:
10680:
10675:
10670:
10665:
10660:
10655:
10650:
10645:
10640:
10635:
10630:
10625:
10620:
10615:
10610:
10605:
10600:
10595:
10594:
10593:
10586:
10579:
10567:
10564:The Innovators
10560:
10555:
10550:
10545:
10540:
10535:
10530:
10525:
10520:
10515:
10510:
10505:
10500:
10495:
10490:
10485:
10479:
10477:
10473:
10472:
10469:
10468:
10466:
10465:
10460:
10455:
10453:Brian Krzanich
10450:
10445:
10440:
10435:
10432:
10428:
10426:
10422:
10421:
10419:
10418:
10413:
10407:
10405:
10398:
10394:
10393:
10391:
10390:
10385:
10380:
10375:
10370:
10365:
10359:
10357:
10353:
10352:
10349:
10348:
10346:
10345:
10340:
10335:
10330:
10325:
10320:
10315:
10310:
10309:
10308:
10303:
10298:
10293:
10283:
10278:
10272:
10270:
10266:
10265:
10262:
10261:
10259:
10258:
10253:
10248:
10243:
10238:
10233:
10228:
10223:
10218:
10212:
10210:
10206:
10205:
10203:
10202:
10201:
10200:
10195:
10190:
10185:
10180:
10175:
10165:
10164:
10163:
10158:
10153:
10148:
10143:
10138:
10133:
10128:
10123:
10118:
10113:
10108:
10103:
10093:
10092:
10091:
10086:
10081:
10076:
10066:
10065:
10064:
10059:
10049:
10048:
10047:
10042:
10031:
10029:
10018:
10017:
10015:
10014:
10009:
10004:
10003:
10002:
9997:
9995:NetBurst-based
9992:
9982:
9977:
9976:
9975:
9970:
9965:
9960:
9955:
9950:
9945:
9940:
9930:
9929:
9928:
9922:
9911:
9910:
9909:
9904:
9894:
9889:
9888:
9887:
9882:
9877:
9872:
9867:
9862:
9852:
9851:
9850:
9845:
9840:
9829:
9827:
9816:
9815:
9813:
9812:
9807:
9802:
9801:32-bit databus
9799:
9794:
9789:
9784:
9783:16-bit databus
9781:
9775:
9771:
9769:
9758:
9757:
9755:
9754:
9748:
9742:
9736:
9730:
9723:
9721:
9709:
9708:
9706:
9705:
9699:
9693:
9686:
9684:
9676:
9675:
9673:
9672:
9666:
9659:
9657:
9643:
9639:
9638:
9635:
9634:
9632:
9631:
9626:
9625:
9624:
9619:
9614:
9609:
9604:
9594:
9589:
9584:
9578:
9576:
9562:
9558:
9557:
9554:
9553:
9551:
9550:
9549:
9548:
9538:
9537:
9536:
9526:
9525:
9524:
9519:
9508:
9506:
9497:
9496:
9494:
9493:
9488:
9483:
9482:
9481:
9471:
9470:
9469:
9459:
9458:
9457:
9447:
9446:
9445:
9435:
9434:
9433:
9423:
9422:
9421:
9410:
9408:
9397:
9396:
9394:
9393:
9388:
9387:
9386:
9381:
9371:
9365:
9363:
9349:
9343:
9342:
9340:
9339:
9334:
9329:
9328:
9327:
9322:
9317:
9312:
9311:
9310:
9305:
9300:
9295:
9290:
9285:
9275:
9274:
9273:
9268:
9263:
9258:
9253:
9248:
9238:
9233:
9222:
9220:
9216:
9215:
9208:
9207:
9200:
9193:
9185:
9179:
9178:
9173:
9168:
9163:
9158:
9148:
9143:
9138:
9133:
9128:
9123:
9118:
9113:
9108:
9103:
9098:
9093:
9088:
9083:
9078:
9073:
9068:
9063:
9058:
9053:
9048:
9043:
9038:
9036:Amplify Tablet
9033:
9028:
9022:
9020:
9016:
9015:
9008:
9006:
9002:
9001:
8999:
8998:
8993:
8988:
8983:
8978:
8973:
8970:Intel Security
8966:
8961:
8953:
8951:
8947:
8946:
8939:
8938:
8931:
8924:
8916:
8907:
8906:
8902:struck through
8899:
8896:
8895:
8893:
8892:
8886:
8880:
8873:
8871:
8869:Virtualization
8865:
8864:
8862:
8861:
8856:
8849:
8847:
8841:
8840:
8838:
8837:
8831:
8825:
8819:
8813:
8807:
8801:
8795:
8788:
8786:
8779:
8778:
8776:
8775:
8770:
8765:
8759:
8757:
8751:
8750:
8748:
8747:
8741:
8734:
8732:
8726:
8725:
8723:
8722:
8716:
8710:
8704:
8698:
8692:
8686:
8680:
8674:
8666:
8660:
8654:
8648:
8642:
8636:
8630:
8623:
8621:
8610:
8609:
8607:
8606:
8605:
8604:
8594:
8593:
8592:
8582:
8581:
8580:
8570:
8569:
8568:
8563:
8558:
8553:
8543:
8542:
8541:
8536:
8526:
8525:
8524:
8513:
8511:
8500:
8499:
8489:
8488:
8481:
8474:
8466:
8457:
8456:
8454:
8453:
8448:
8443:
8438:
8433:
8428:
8423:
8421:Memory address
8418:
8417:
8416:
8411:
8406:
8404:Interrupt flag
8401:
8399:Direction flag
8396:
8386:
8380:
8378:
8372:
8371:
8369:
8368:
8362:
8356:
8350:
8344:
8338:
8332:
8329:Flat Assembler
8326:
8320:
8318:
8312:
8311:
8309:
8308:
8303:
8301:Microassembler
8298:
8293:
8288:
8283:
8278:
8273:
8267:
8265:
8261:
8260:
8255:
8254:
8247:
8240:
8232:
8226:
8225:
8220:
8215:
8209:
8204:
8197:
8196:External links
8194:
8193:
8192:
8151:
8148:
8146:
8145:
8119:
8093:
8074:
8048:
8036:Tom's Hardware
8022:
7996:
7970:
7942:
7907:
7874:
7838:
7802:
7768:
7727:
7714:Tom's Hardware
7698:
7673:
7648:
7623:
7611:Tom's Hardware
7597:
7586:(3): 268–277.
7566:
7531:
7505:
7471:
7437:
7403:
7369:
7339:
7305:
7276:
7250:
7235:
7217:
7186:
7152:
7120:
7088:
7067:"DSB Switches"
7058:
7032:
7004:
6986:
6960:
6935:
6910:
6885:
6855:
6816:
6781:
6753:
6728:
6693:
6662:
6625:
6591:
6576:. Dvorak.org.
6564:
6530:
6524:Tom's Hardware
6509:
6502:
6484:
6477:
6455:
6440:
6428:
6426:
6423:
6421:
6420:
6410:
6400:
6390:
6381:
6379:, may use two.
6368:
6359:
6341:
6332:
6319:
6309:
6296:
6287:
6266:
6245:
6227:Including the
6220:
6207:
6193:
6191:
6188:
6186:
6185:
6180:
6175:
6170:
6165:
6160:
6155:
6150:
6145:
6140:
6135:
6130:
6124:
6118:
6113:
6108:
6103:
6098:
6093:
6087:
6085:
6082:
6058:
6057:
6054:
6051:
6048:
6045:
6029:
6026:
6021:Main article:
6018:
6015:
5940:Main article:
5937:
5936:Virtualization
5934:
5877:supercomputers
5755:Main article:
5751:
5750:
5709:
5707:
5700:
5694:
5691:
5655:Main article:
5652:
5649:
5601:HyperThreading
5552:
5544:
5511:Main article:
5508:
5505:
5451:Main article:
5448:
5445:
5410:floating-point
5396:Main article:
5393:
5390:
5388:
5385:
5332:Mass-produced
5291:Main article:
5288:
5285:
5267:Main article:
5264:
5261:
5257:protected mode
5222:virtual memory
5189:(GDT) and the
5175:virtual memory
5161:
5160:
5119:
5117:
5110:
5103:Protected mode
5101:Main article:
5098:
5097:Protected mode
5095:
5072:
5069:
5053:Main article:
5050:
5047:
5005:
5004:
4963:
4961:
4954:
4945:Main article:
4942:
4939:
4937:
4934:
4931:
4930:
4927:
4924:
4923:
4920:
4917:
4916:
4912:
4911:
4908:
4905:
4902:
4899:
4896:
4893:
4890:
4876:
4875:
4872:
4869:
4868:
4865:
4862:
4861:
4858:
4855:
4854:
4850:
4849:
4846:
4843:
4840:
4837:
4834:
4831:
4828:
4814:
4813:
4810:
4807:
4806:
4803:
4800:
4799:
4796:
4793:
4792:
4788:
4787:
4784:
4781:
4778:
4775:
4772:
4769:
4766:
4755:
4754:
4750:
4749:
4746:
4735:
4734:
4731:
4728:
4727:
4724:
4721:
4720:
4717:
4714:
4713:
4709:
4708:
4705:
4702:
4699:
4696:
4693:
4690:
4687:
4676:
4675:
4672:
4669:
4666:
4665:
4662:
4659:
4658:
4655:
4652:
4651:
4647:
4646:
4643:
4640:
4637:
4634:
4631:
4628:
4625:
4615:
4612:
4575:
4574:
4571:
4568:
4567:ES: Extra data
4565:
4562:
4559:
4552:
4551:
4544:
4537:
4526:
4519:
4516:
4513:
4510:
4507:
4498:
4495:
4480:test registers
4461:protected mode
4456:
4453:
4442:
4439:
4424:
4421:
4406:
4403:
4368:
4365:
4315:FLAGS register
4298:
4295:
4283:protected mode
4233:FLAGS register
4196:
4193:
4184:
4181:
4177:return address
4159:(one segment)
4126:
4125:
4112:
4109:
4106:
4103:
4100:
4097:
4094:
4091:
4088:
4085:
4082:
4079:
4074:
4069:
4063:
4054:
4051:
4048:
4043:
4042:
4039:
4038:
4035:
4032:
4027:
4021:
4016:
4010:
4007:
4006:
4003:
4000:
3999:
3996:
3993:
3992:
3989:
3986:
3985:
3983:
3978:
3973:
3967:
3964:
3963:
3958:
3955:
3952:
3947:
3946:
3943:
3940:
3939:
3937:
3932:
3931:
3928:
3926:
3921:
3916:
3910:
3907:
3906:
3901:
3898:
3895:
3890:
3889:
3886:
3883:
3882:
3880:
3865:
3860:
3857:
3852:
3851:
3848:
3843:
3840:
3835:
3834:
3831:
3830:
3827:
3825:
3809:
3808:
3795:
3792:
3789:
3786:
3783:
3780:
3777:
3774:
3771:
3768:
3765:
3762:
3757:
3752:
3746:
3741:
3735:
3732:
3731:
3728:
3725:
3724:
3721:
3718:
3717:
3714:
3711:
3710:
3708:
3703:
3698:
3690:
3687:
3684:
3679:
3678:
3673:
3670:
3667:
3662:
3661:
3656:
3653:
3650:
3645:
3644:
3639:
3636:
3633:
3628:
3627:
3622:
3619:
3616:
3611:
3610:
3605:
3602:
3599:
3594:
3593:
3588:
3585:
3582:
3577:
3576:
3574:
3569:
3568:
3565:
3563:
3558:
3553:
3545:
3542:
3539:
3534:
3533:
3528:
3525:
3522:
3517:
3516:
3511:
3508:
3505:
3500:
3499:
3494:
3491:
3488:
3483:
3482:
3477:
3474:
3471:
3466:
3465:
3460:
3457:
3454:
3449:
3448:
3443:
3440:
3437:
3432:
3431:
3426:
3423:
3420:
3415:
3414:
3412:
3397:
3392:
3389:
3384:
3383:
3380:
3375:
3372:
3367:
3366:
3363:
3358:
3355:
3350:
3349:
3346:
3341:
3338:
3333:
3332:
3329:
3324:
3321:
3316:
3315:
3312:
3307:
3304:
3299:
3298:
3284:
3283:
3270:
3267:
3264:
3261:
3258:
3255:
3252:
3249:
3246:
3243:
3240:
3237:
3232:
3227:
3221:
3216:
3208:
3205:
3200:
3199:
3194:
3191:
3186:
3185:
3183:
3178:
3173:
3165:
3162:
3157:
3156:
3151:
3148:
3143:
3142:
3140:
3135:
3134:
3131:
3129:
3114:
3109:
3106:
3101:
3100:
3097:
3092:
3089:
3084:
3083:
3080:
3075:
3072:
3067:
3066:
3063:
3058:
3055:
3050:
3049:
3031:
3028:
2946:Xeon Foster MP
2901:
2898:
2837:
2834:
2793:
2790:
2744:In 1999–2003,
2741:architecture.
2714:
2711:
2367:
2364:
2362:
2359:
2356:
2355:
2352:
2347:
2344:
2341:
2337:
2336:
2335:compute cores
2329:
2323:
2319:
2318:
2315:
2312:
2305:
2301:
2300:
2297:
2291:
2287:
2286:
2283:
2280:
2269:
2265:
2264:
2261:
2258:
2252:
2248:
2247:
2244:
2241:
2222:
2218:
2217:
2211:
2208:
2204:
2203:
2200:
2189:
2185:
2184:
2181:
2173:
2169:
2168:
2165:
2162:
2151:
2147:
2146:
2143:
2140:
2100:
2096:
2095:
2092:
2060:
2056:
2055:
2050:instructions,
2048:BMI1, and BMI2
2033:
2030:
2007:
2006:
2000:
1997:
1988:
1987:
1981:
1973:
1969:
1968:
1961:
1958:Knights Corner
1949:
1948:
1935:
1932:
1925:
1921:
1920:
1913:
1889:
1888:
1885:
1882:
1874:
1873:
1867:
1864:
1857:
1853:
1852:
1849:
1846:
1841:
1837:
1836:
1827:
1821:
1820:
1805:
1788:
1787:
1784:
1778:
1777:
1772:
1769:
1763:
1759:
1758:
1740:
1737:
1717:
1713:
1712:
1702:
1687:
1683:
1682:
1665:
1662:
1647:
1643:
1642:
1620:HyperTransport
1613:
1610:
1575:
1571:
1570:
1566:
1561:
1555:
1554:
1546:
1543:
1536:
1533:
1528:
1522:
1521:
1504:
1498:
1497:
1487:
1471:
1467:
1466:
1453:
1450:
1443:
1442:
1432:
1429:
1424:
1420:
1419:
1409:
1406:
1381:
1378:
1374:
1373:
1367:
1364:
1350:
1346:
1345:
1326:
1306:
1302:
1301:
1283:
1276:
1270:
1267:
1255:
1254:
1249:
1235:
1231:
1230:
1223:
1207:
1203:
1202:
1190:, faster FPU,
1178:
1167:
1164:
1152:
1151:
1135:
1109:
1106:
1099:
1098:
1086:
1083:
1080:
1077:
1067:
1064:
1059:
1053:
1052:
1042:protected mode
1039:
1036:
1033:
1027:
1021:
1020:
1017:
1003:
999:
998:
981:
978:
975:
972:
962:
959:
954:
950:
949:
944:
939:
933:
932:
929:
924:
921:
918:
903:
902:
817:
815:
808:
802:
799:
673:Microsystem 80
645:Intel iAPX 432
618:
615:
582:(1981) debut.
467:
466:
464:
463:
445:
434:
426:
424:
422:Floating point
418:
417:
415:
414:
411:
408:
404:
402:
396:
395:
389:
388:
365:
361:
360:
183:
179:
178:
140:
136:
135:
132:
126:
125:
123:Condition code
120:
114:
113:
110:
104:
103:
98:
94:
93:
88:
82:
81:
78:
74:
73:
60:
56:
55:
46:
26:
9:
6:
4:
3:
2:
12704:
12693:
12690:
12688:
12685:
12683:
12680:
12678:
12675:
12674:
12672:
12657:
12654:
12652:
12649:
12647:
12644:
12642:
12639:
12637:
12634:
12632:
12629:
12627:
12624:
12622:
12619:
12617:
12614:
12613:
12611:
12607:
12600:
12597:
12595:
12592:
12590:
12587:
12585:
12582:
12580:
12577:
12575:
12572:
12570:
12567:
12566:
12564:
12562:
12556:
12546:
12543:
12541:
12538:
12536:
12533:
12531:
12528:
12526:
12523:
12519:
12516:
12514:
12511:
12509:
12506:
12505:
12504:
12501:
12500:
12498:
12496:
12492:
12486:
12483:
12479:
12476:
12474:
12471:
12470:
12469:
12466:
12462:
12459:
12458:
12457:
12454:
12452:
12449:
12447:
12446:Demultiplexer
12444:
12442:
12439:
12438:
12436:
12434:
12430:
12424:
12421:
12419:
12416:
12413:
12411:
12408:
12406:
12403:
12401:
12398:
12396:
12393:
12392:
12390:
12388:
12384:
12378:
12375:
12373:
12370:
12368:
12367:Memory buffer
12365:
12363:
12362:Register file
12360:
12358:
12355:
12353:
12350:
12348:
12345:
12344:
12342:
12340:
12336:
12328:
12325:
12323:
12320:
12319:
12318:
12315:
12313:
12310:
12308:
12305:
12303:
12302:Combinational
12300:
12299:
12297:
12295:
12291:
12285:
12282:
12278:
12275:
12274:
12272:
12269:
12267:
12264:
12262:
12259:
12254:
12251:
12249:
12246:
12245:
12243:
12240:
12237:
12234:
12231:
12228:
12225:
12222:
12221:
12219:
12217:
12211:
12205:
12202:
12200:
12197:
12195:
12192:
12190:
12187:
12183:
12180:
12178:
12175:
12173:
12170:
12168:
12165:
12163:
12160:
12158:
12155:
12154:
12153:
12150:
12148:
12145:
12144:
12142:
12138:
12132:
12129:
12127:
12124:
12122:
12119:
12117:
12114:
12113:
12111:
12107:
12099:
12096:
12095:
12094:
12091:
12089:
12086:
12084:
12081:
12079:
12076:
12074:
12071:
12069:
12066:
12064:
12061:
12059:
12056:
12054:
12051:
12049:
12046:
12044:
12041:
12039:
12036:
12034:
12031:
12029:
12026:
12024:
12021:
12020:
12018:
12016:
12012:
12002:
11999:
11997:
11994:
11992:
11989:
11986:
11983:
11980:
11977:
11974:
11971:
11968:
11965:
11963:
11960:
11957:
11954:
11952:
11949:
11947:
11944:
11943:
11941:
11939:
11933:
11926:
11923:
11921:
11918:
11915:
11912:
11909:
11906:
11905:
11903:
11897:
11891:
11888:
11886:
11883:
11881:
11878:
11876:
11873:
11871:
11868:
11866:
11863:
11861:
11858:
11857:
11855:
11851:
11844:
11841:
11838:
11835:
11832:
11829:
11827:
11824:
11822:
11819:
11817:
11814:
11812:
11809:
11807:
11804:
11802:
11799:
11797:
11794:
11792:
11789:
11787:
11784:
11782:
11779:
11775:
11772:
11771:
11769:
11766:
11763:
11760:
11759:
11757:
11755:
11751:
11745:
11742:
11740:
11737:
11734:
11731:
11728:
11725:
11722:
11719:
11716:
11713:
11710:
11707:
11702:
11699:
11698:
11696:
11693:
11691:
11688:
11687:
11685:
11683:
11677:
11665:
11662:
11661:
11660:
11657:
11655:
11652:
11648:
11645:
11643:
11640:
11638:
11635:
11633:
11630:
11629:
11628:
11625:
11623:
11620:
11619:
11617:
11615:
11611:
11605:
11602:
11600:
11597:
11595:
11592:
11588:
11585:
11583:
11580:
11579:
11578:
11575:
11573:
11570:
11569:
11567:
11565:
11561:
11555:
11552:
11550:
11547:
11543:
11540:
11539:
11538:
11535:
11531:
11528:
11526:
11523:
11522:
11521:
11518:
11514:
11511:
11509:
11506:
11505:
11504:
11501:
11499:
11496:
11492:
11489:
11487:
11484:
11483:
11482:
11479:
11478:
11476:
11472:
11469:
11467:
11463:
11453:
11450:
11448:
11445:
11444:
11442:
11440:
11436:
11430:
11427:
11425:
11422:
11418:
11415:
11413:
11410:
11409:
11408:
11405:
11403:
11402:Scoreboarding
11400:
11399:
11397:
11395:
11391:
11385:
11384:False sharing
11382:
11380:
11377:
11375:
11372:
11370:
11367:
11366:
11364:
11362:
11358:
11352:
11349:
11347:
11344:
11342:
11339:
11338:
11336:
11334:
11330:
11327:
11325:
11321:
11311:
11308:
11306:
11303:
11301:
11298:
11295:
11291:
11288:
11286:
11283:
11281:
11278:
11276:
11273:
11272:
11270:
11268:
11265:
11263:
11260:
11258:
11255:
11253:
11250:
11248:
11245:
11243:
11240:
11238:
11235:
11233:
11230:
11228:
11225:
11223:
11220:
11218:
11215:
11213:
11210:
11206:
11203:
11201:
11198:
11196:
11193:
11192:
11190:
11188:
11185:
11183:
11180:
11178:
11177:Stanford MIPS
11175:
11173:
11170:
11168:
11165:
11163:
11160:
11158:
11155:
11153:
11150:
11149:
11147:
11141:
11133:
11130:
11129:
11128:
11125:
11123:
11120:
11118:
11115:
11113:
11110:
11108:
11105:
11103:
11100:
11098:
11095:
11091:
11088:
11087:
11086:
11083:
11079:
11076:
11075:
11074:
11071:
11069:
11066:
11064:
11061:
11059:
11056:
11054:
11051:
11050:
11048:
11044:
11041:
11039:
11038:architectures
11033:
11027:
11024:
11022:
11019:
11017:
11014:
11012:
11009:
11007:
11006:Heterogeneous
11004:
11000:
10997:
10995:
10992:
10991:
10990:
10987:
10985:
10982:
10978:
10975:
10973:
10970:
10968:
10965:
10963:
10960:
10959:
10958:
10957:Memory access
10955:
10953:
10950:
10948:
10945:
10943:
10940:
10938:
10935:
10931:
10928:
10927:
10926:
10923:
10921:
10918:
10916:
10913:
10912:
10910:
10908:
10904:
10896:
10893:
10891:
10890:Random-access
10888:
10886:
10883:
10881:
10878:
10877:
10876:
10873:
10871:
10870:Stack machine
10868:
10866:
10863:
10859:
10856:
10854:
10851:
10849:
10846:
10844:
10841:
10839:
10836:
10834:
10831:
10829:
10826:
10824:
10821:
10820:
10819:
10816:
10812:
10809:
10807:
10804:
10802:
10799:
10797:
10794:
10792:
10789:
10787:
10786:with datapath
10784:
10783:
10782:
10779:
10777:
10774:
10772:
10769:
10768:
10766:
10764:
10760:
10756:
10749:
10744:
10742:
10737:
10735:
10730:
10729:
10726:
10714:
10711:
10709:
10706:
10704:
10701:
10699:
10696:
10694:
10691:
10689:
10686:
10684:
10681:
10679:
10676:
10674:
10671:
10669:
10666:
10664:
10661:
10659:
10656:
10654:
10651:
10649:
10646:
10644:
10641:
10639:
10636:
10634:
10631:
10629:
10626:
10624:
10621:
10619:
10618:Intel Ireland
10616:
10614:
10611:
10609:
10606:
10604:
10603:Intel Capital
10601:
10599:
10596:
10592:
10591:
10587:
10585:
10584:
10580:
10578:
10577:
10573:
10572:
10571:
10568:
10566:
10565:
10561:
10559:
10556:
10554:
10551:
10549:
10546:
10544:
10541:
10539:
10536:
10534:
10531:
10529:
10526:
10524:
10521:
10519:
10518:Copy Exactly!
10516:
10514:
10511:
10509:
10506:
10504:
10501:
10499:
10496:
10494:
10491:
10489:
10486:
10484:
10481:
10480:
10478:
10474:
10464:
10463:Pat Gelsinger
10461:
10459:
10456:
10454:
10451:
10449:
10448:Paul Otellini
10446:
10444:
10443:Craig Barrett
10441:
10439:
10436:
10433:
10430:
10429:
10427:
10423:
10417:
10414:
10412:
10409:
10408:
10406:
10402:
10399:
10395:
10389:
10386:
10384:
10381:
10379:
10376:
10374:
10371:
10369:
10366:
10364:
10361:
10360:
10358:
10354:
10344:
10341:
10339:
10336:
10334:
10331:
10329:
10326:
10324:
10321:
10319:
10316:
10314:
10311:
10307:
10304:
10302:
10299:
10297:
10294:
10292:
10289:
10288:
10287:
10284:
10282:
10279:
10277:
10274:
10273:
10271:
10267:
10257:
10254:
10252:
10249:
10247:
10244:
10242:
10239:
10237:
10234:
10232:
10229:
10227:
10224:
10222:
10219:
10217:
10214:
10213:
10211:
10207:
10199:
10198:Skylake-based
10196:
10194:
10191:
10189:
10188:Haswell-based
10186:
10184:
10181:
10179:
10176:
10174:
10173:Nehalem-based
10171:
10170:
10169:
10166:
10162:
10159:
10157:
10154:
10152:
10149:
10147:
10144:
10142:
10139:
10137:
10134:
10132:
10129:
10127:
10124:
10122:
10119:
10117:
10114:
10112:
10109:
10107:
10104:
10102:
10099:
10098:
10097:
10094:
10090:
10087:
10085:
10082:
10080:
10077:
10075:
10072:
10071:
10070:
10067:
10063:
10060:
10058:
10055:
10054:
10053:
10050:
10046:
10043:
10041:
10038:
10037:
10036:
10033:
10032:
10030:
10027:
10023:
10019:
10013:
10010:
10008:
10005:
10001:
9998:
9996:
9993:
9991:
9988:
9987:
9986:
9983:
9981:
9978:
9974:
9971:
9969:
9966:
9964:
9961:
9959:
9956:
9954:
9951:
9949:
9946:
9944:
9941:
9939:
9938:Original i586
9936:
9935:
9934:
9931:
9926:
9923:
9921:
9918:
9917:
9915:
9912:
9908:
9905:
9903:
9900:
9899:
9898:
9895:
9893:
9890:
9886:
9883:
9881:
9878:
9876:
9873:
9871:
9868:
9866:
9863:
9861:
9858:
9857:
9856:
9853:
9849:
9846:
9844:
9841:
9839:
9836:
9835:
9834:
9831:
9830:
9828:
9825:
9821:
9817:
9811:
9808:
9806:
9803:
9800:
9798:
9795:
9793:
9790:
9788:
9785:
9782:
9779:
9776:
9773:
9772:
9770:
9767:
9763:
9759:
9752:
9749:
9746:
9743:
9740:
9737:
9734:
9731:
9728:
9725:
9724:
9722:
9719:
9715:
9710:
9703:
9700:
9697:
9694:
9691:
9688:
9687:
9685:
9682:
9677:
9670:
9667:
9664:
9661:
9660:
9658:
9655:
9651:
9647:
9644:
9640:
9630:
9627:
9623:
9620:
9618:
9615:
9613:
9610:
9608:
9605:
9603:
9600:
9599:
9598:
9595:
9593:
9590:
9588:
9585:
9583:
9580:
9579:
9577:
9574:
9570:
9566:
9563:
9559:
9547:
9544:
9543:
9542:
9539:
9535:
9534:Goldmont Plus
9532:
9531:
9530:
9527:
9523:
9520:
9518:
9515:
9514:
9513:
9510:
9509:
9507:
9505:
9502:
9498:
9492:
9489:
9487:
9484:
9480:
9477:
9476:
9475:
9472:
9468:
9465:
9464:
9463:
9460:
9456:
9453:
9452:
9451:
9448:
9444:
9441:
9440:
9439:
9436:
9432:
9429:
9428:
9427:
9424:
9420:
9417:
9416:
9415:
9412:
9411:
9409:
9406:
9402:
9398:
9392:
9389:
9385:
9382:
9380:
9377:
9376:
9375:
9372:
9370:
9367:
9366:
9364:
9361:
9357:
9353:
9350:
9348:
9344:
9338:
9335:
9333:
9330:
9326:
9323:
9321:
9318:
9316:
9313:
9309:
9306:
9304:
9301:
9299:
9296:
9294:
9291:
9289:
9286:
9284:
9281:
9280:
9279:
9276:
9272:
9269:
9267:
9264:
9262:
9259:
9257:
9254:
9252:
9249:
9247:
9244:
9243:
9242:
9239:
9237:
9234:
9232:
9229:
9228:
9227:
9224:
9223:
9221:
9217:
9213:
9206:
9201:
9199:
9194:
9192:
9187:
9186:
9183:
9177:
9174:
9172:
9169:
9167:
9164:
9162:
9159:
9156:
9152:
9149:
9147:
9146:Shooting Star
9144:
9142:
9139:
9137:
9134:
9132:
9129:
9127:
9124:
9122:
9119:
9117:
9114:
9112:
9109:
9107:
9104:
9102:
9099:
9097:
9094:
9092:
9089:
9087:
9084:
9082:
9079:
9077:
9074:
9072:
9069:
9067:
9064:
9062:
9059:
9057:
9054:
9052:
9049:
9047:
9044:
9042:
9039:
9037:
9034:
9032:
9029:
9027:
9024:
9023:
9021:
9017:
9012:
9007:
9005:Joint venture
9003:
8997:
8994:
8992:
8989:
8987:
8984:
8982:
8979:
8977:
8974:
8972:
8971:
8967:
8965:
8962:
8960:
8959:
8955:
8954:
8952:
8948:
8944:
8937:
8932:
8930:
8925:
8923:
8918:
8917:
8914:
8903:
8897:
8890:
8887:
8884:
8881:
8878:
8875:
8874:
8872:
8870:
8866:
8860:
8857:
8854:
8851:
8850:
8848:
8846:
8842:
8835:
8832:
8829:
8826:
8823:
8820:
8817:
8814:
8811:
8808:
8805:
8802:
8799:
8796:
8793:
8790:
8789:
8787:
8785:
8782:Security and
8780:
8774:
8771:
8769:
8766:
8764:
8761:
8760:
8758:
8756:
8752:
8745:
8742:
8739:
8736:
8735:
8733:
8731:
8727:
8720:
8717:
8714:
8711:
8708:
8705:
8702:
8699:
8696:
8693:
8690:
8687:
8684:
8681:
8678:
8675:
8673:
8670:
8667:
8664:
8661:
8658:
8655:
8652:
8649:
8646:
8643:
8640:
8637:
8634:
8631:
8628:
8625:
8624:
8622:
8619:
8615:
8611:
8603:
8600:
8599:
8598:
8595:
8591:
8588:
8587:
8586:
8583:
8579:
8576:
8575:
8574:
8571:
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8564:
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8559:
8557:
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8537:
8535:
8532:
8531:
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8527:
8523:
8520:
8519:
8518:
8515:
8514:
8512:
8509:
8505:
8501:
8497:
8494:
8487:
8482:
8480:
8475:
8473:
8468:
8467:
8464:
8452:
8449:
8447:
8444:
8442:
8439:
8437:
8434:
8432:
8429:
8427:
8424:
8422:
8419:
8415:
8412:
8410:
8409:Overflow flag
8407:
8405:
8402:
8400:
8397:
8395:
8392:
8391:
8390:
8387:
8385:
8382:
8381:
8379:
8373:
8366:
8363:
8360:
8357:
8354:
8351:
8348:
8345:
8342:
8339:
8336:
8335:GNU Assembler
8333:
8330:
8327:
8325:
8322:
8321:
8319:
8317:
8313:
8307:
8304:
8302:
8299:
8297:
8294:
8292:
8289:
8287:
8284:
8282:
8279:
8277:
8274:
8272:
8269:
8268:
8266:
8262:
8253:
8248:
8246:
8241:
8239:
8234:
8233:
8230:
8224:
8221:
8219:
8216:
8213:
8210:
8208:
8205:
8203:
8200:
8199:
8189:
8185:
8181:
8177:
8172:
8167:
8163:
8159:
8158:IEEE Computer
8154:
8153:
8133:
8129:
8123:
8108:
8104:
8097:
8089:
8088:Tech Insights
8085:
8078:
8063:
8062:The New Stack
8059:
8052:
8037:
8033:
8026:
8011:
8007:
8000:
7985:
7981:
7974:
7959:
7958:
7953:
7946:
7927:
7920:
7919:
7911:
7895:
7891:
7890:
7885:
7878:
7859:
7855:
7848:
7842:
7835:
7819:
7812:
7806:
7799:
7787:
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7765:
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7745:
7738:
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7715:
7711:
7705:
7703:
7683:
7677:
7662:
7658:
7652:
7637:
7634:
7627:
7612:
7608:
7601:
7593:
7589:
7585:
7581:
7577:
7570:
7554:
7550:
7546:
7540:
7538:
7536:
7519:
7515:
7509:
7490:
7483:
7482:
7475:
7456:
7449:
7448:
7441:
7422:
7415:
7414:
7407:
7388:
7381:
7380:
7373:
7357:
7353:
7349:
7343:
7324:
7317:
7316:
7309:
7302:
7290:
7286:
7280:
7264:
7260:
7254:
7246:
7242:
7238:
7232:
7228:
7221:
7205:
7201:
7200:
7193:
7191:
7171:
7164:
7163:
7156:
7137:
7130:
7124:
7105:
7098:
7092:
7076:
7072:
7068:
7062:
7051:September 14,
7046:
7042:
7036:
7021:
7020:
7015:
7008:
7000:
6996:
6990:
6979:September 14,
6974:
6970:
6964:
6949:
6945:
6939:
6924:
6920:
6914:
6899:
6895:
6889:
6873:
6869:
6865:
6859:
6852:
6837:
6830:
6823:
6821:
6801:
6794:
6788:
6786:
6770:
6769:
6764:
6757:
6750:
6746:
6742:
6738:
6732:
6724:
6720:
6716:
6712:
6708:
6704:
6697:
6686:September 14,
6681:
6677:
6673:
6666:
6647:
6640:
6639:
6632:
6630:
6610:
6603:
6602:
6595:
6579:
6575:
6568:
6561:
6549:
6545:
6541:
6534:
6526:
6525:
6520:
6513:
6505:
6499:
6495:
6488:
6480:
6474:
6470:
6466:
6459:
6451:
6444:
6433:
6429:
6414:
6404:
6394:
6385:
6378:
6372:
6363:
6356:
6355:
6352:
6345:
6336:
6328:
6323:
6313:
6306:
6305:architectures
6300:
6291:
6284:
6280:
6276:
6270:
6263:
6259:
6255:
6249:
6242:
6238:
6234:
6230:
6224:
6217:
6211:
6204:
6198:
6194:
6184:
6181:
6179:
6176:
6174:
6171:
6169:
6166:
6164:
6161:
6159:
6156:
6154:
6151:
6149:
6146:
6144:
6141:
6139:
6136:
6134:
6131:
6128:
6125:
6122:
6119:
6117:
6114:
6112:
6109:
6107:
6104:
6102:
6099:
6097:
6094:
6092:
6089:
6088:
6081:
6079:
6078:extended EVEX
6075:
6071:
6067:
6063:
6055:
6052:
6049:
6046:
6043:
6042:
6041:
6038:
6036:
6024:
6014:
6011:
6009:
6005:
6001:
5997:
5993:
5989:
5985:
5981:
5977:
5973:
5969:
5965:
5961:
5957:
5953:
5949:
5943:
5933:
5931:
5927:
5923:
5919:
5915:
5911:
5907:
5906:Intel Core i7
5903:
5899:
5894:
5890:
5886:
5882:
5878:
5872:
5870:
5866:
5861:
5858:
5857:
5851:
5849:
5845:
5841:
5837:
5831:
5829:
5824:
5820:
5816:
5812:
5807:
5800:
5796:
5792:
5788:
5784:
5780:
5775:
5771:
5768:
5767:supercomputer
5763:
5758:
5747:
5744:
5736:
5726:
5722:
5716:
5715:
5710:This section
5708:
5704:
5699:
5698:
5690:
5688:
5684:
5679:
5675:
5671:
5667:
5663:
5658:
5648:
5644:
5642:
5635:
5631:
5626:
5623:
5619:
5613:
5611:
5605:
5602:
5598:
5594:
5590:
5589:
5584:
5578:
5574:
5570:
5566:
5562:
5558:
5543:
5540:
5534:
5532:
5528:
5524:
5520:
5514:
5504:
5502:
5498:
5494:
5490:
5486:
5482:
5477:
5475:
5470:
5468:
5464:
5460:
5454:
5444:
5440:
5437:
5432:
5430:
5426:
5422:
5418:
5417:co-processors
5415:
5411:
5405:
5399:
5384:
5380:
5376:
5374:
5370:
5366:
5362:
5358:
5353:
5351:
5347:
5343:
5339:
5335:
5330:
5328:
5324:
5320:
5316:
5311:
5309:
5305:
5301:
5294:
5284:
5282:
5278:
5277:
5270:
5260:
5258:
5254:
5250:
5246:
5241:
5238:
5234:
5230:
5225:
5223:
5219:
5215:
5210:
5206:
5204:
5200:
5196:
5192:
5188:
5184:
5180:
5176:
5172:
5168:
5157:
5154:
5146:
5136:
5132:
5126:
5125:
5120:This section
5118:
5114:
5109:
5108:
5104:
5094:
5092:
5088:
5084:
5078:
5068:
5066:
5062:
5056:
5046:
5042:
5040:
5036:
5032:
5028:
5024:
5020:
5016:
5012:
5001:
4998:
4990:
4980:
4976:
4970:
4969:
4964:This section
4962:
4958:
4953:
4952:
4948:
4925:
4918:
4913:
4909:
4906:
4903:
4900:
4897:
4894:
4891:
4888:
4887:
4881:
4873:
4870:
4863:
4856:
4851:
4847:
4844:
4841:
4838:
4835:
4832:
4829:
4826:
4825:
4819:
4811:
4808:
4801:
4794:
4789:
4785:
4782:
4779:
4776:
4773:
4770:
4767:
4764:
4763:
4751:
4747:
4744:
4743:
4732:
4729:
4722:
4715:
4710:
4706:
4703:
4700:
4697:
4694:
4691:
4688:
4685:
4684:
4673:
4670:
4667:
4660:
4653:
4648:
4644:
4641:
4638:
4635:
4632:
4629:
4626:
4623:
4622:
4611:
4609:
4605:
4601:
4596:
4594:
4590:
4587:
4583:
4578:
4572:
4569:
4566:
4563:
4560:
4557:
4556:
4555:
4549:
4545:
4542:
4538:
4535:
4531:
4527:
4524:
4520:
4517:
4514:
4511:
4508:
4505:
4504:
4503:
4494:
4491:
4487:
4485:
4481:
4477:
4473:
4468:
4466:
4462:
4452:
4448:
4438:
4436:
4430:
4420:
4418:
4412:
4402:
4400:
4396:
4392:
4388:
4384:
4380:
4374:
4364:
4362:
4358:
4354:
4350:
4345:
4343:
4339:
4334:
4331:
4326:
4324:
4320:
4316:
4312:
4303:
4294:
4292:
4288:
4284:
4281:, to support
4280:
4275:
4269:
4264:
4261:
4257:
4252:
4250:
4246:
4245:overflow flag
4242:
4238:
4234:
4229:
4225:
4223:
4219:
4218:frame pointer
4215:
4210:
4206:
4202:
4199:The original
4190:
4183:x86 registers
4180:
4178:
4174:
4166:
4162:
4155:space, and a
4154:
4143:The 8086 had
4141:
4139:
4135:
4131:
4072:
4067:
4025:
4014:
4008:
4001:
3994:
3987:
3981:
3976:
3971:
3965:
3941:
3935:
3924:
3919:
3914:
3908:
3884:
3878:
3863:
3846:
3823:
3814:
3813:
3812:
3755:
3750:
3739:
3733:
3726:
3719:
3712:
3706:
3701:
3696:
3572:
3561:
3556:
3551:
3410:
3395:
3378:
3361:
3344:
3327:
3310:
3289:
3288:
3287:
3230:
3225:
3214:
3181:
3176:
3171:
3138:
3127:
3112:
3095:
3078:
3061:
3040:
3039:
3038:
3036:
3027:
3025:
3021:
3017:
3013:
3009:
3007:
3001:
2997:
2995:
2989:
2987:
2983:
2979:
2975:
2971:
2967:
2963:
2959:
2955:
2951:
2947:
2943:
2939:
2935:
2931:
2927:
2923:
2919:
2915:
2911:
2907:
2897:
2895:
2891:
2887:
2883:
2879:
2873:
2871:
2867:
2863:
2859:
2855:
2851:
2847:
2843:
2833:
2830:
2825:
2823:
2819:
2815:
2814:little-endian
2811:
2807:
2803:
2799:
2789:
2787:
2783:
2778:
2775:
2771:
2767:
2763:
2759:
2755:
2751:
2747:
2742:
2740:
2736:
2732:
2728:
2724:
2720:
2710:
2708:
2703:
2701:
2697:
2693:
2689:
2685:
2681:
2676:
2674:
2671:
2667:
2663:
2659:
2655:
2651:
2647:
2643:
2639:
2635:
2631:
2627:
2623:
2618:
2616:
2612:
2608:
2604:
2600:
2596:
2591:
2589:
2585:
2581:
2576:
2574:
2570:
2566:
2562:
2559:
2555:
2551:
2546:
2544:
2540:
2536:
2532:
2528:
2524:
2520:
2516:
2511:
2507:
2503:
2499:
2495:
2492:
2487:
2485:
2481:
2477:
2473:
2468:
2466:
2462:
2458:
2454:
2450:
2446:
2442:
2438:
2434:
2430:
2426:
2422:
2418:
2414:
2410:
2406:
2402:
2398:
2394:
2390:
2384:
2376:
2372:
2351:
2350:Address space
2343:Introduction
2338:
2334:
2330:
2328:
2324:
2321:
2320:
2316:
2310:
2306:
2303:
2302:
2298:
2296:
2292:
2289:
2288:
2284:
2278:
2274:
2270:
2267:
2266:
2262:
2257:
2253:
2250:
2249:
2245:
2239:
2235:
2231:
2227:
2223:
2220:
2219:
2215:
2212:
2209:
2206:
2205:
2201:
2198:
2194:
2190:
2187:
2186:
2182:
2178:
2177:Bristol Ridge
2174:
2171:
2170:
2166:
2160:
2156:
2152:
2149:
2148:
2144:
2138:
2134:
2130:
2126:
2121:
2117:
2113:
2109:
2105:
2101:
2098:
2097:
2093:
2090:
2086:
2082:
2078:
2074:
2070:
2069:Intel Core i3
2065:
2061:
2058:
2057:
2053:
2049:
2045:
2041:
2037:
2034:
2028:
2024:
2020:
2016:
2012:
2011:Intel Core i3
2009:
2008:
2004:
2001:
1994:
1990:
1989:
1985:
1982:
1978:
1974:
1970:
1966:
1962:
1959:
1955:
1951:
1950:
1947:
1943:
1939:
1936:
1930:
1926:
1922:
1918:
1914:
1911:
1907:
1902:
1898:
1894:
1893:Intel Core i3
1891:
1890:
1886:
1880:
1876:
1875:
1872:
1868:
1862:
1858:
1854:
1850:
1845:
1842:
1839:
1838:
1835:
1831:
1828:
1826:
1823:
1822:
1818:
1814:
1810:
1806:
1803:
1798:
1794:
1790:
1789:
1785:
1783:
1780:
1779:
1776:
1773:
1767:
1764:
1760:
1757:
1753:
1749:
1745:
1741:
1735:
1730:
1725:
1721:
1718:
1715:
1714:
1710:
1706:
1703:
1700:
1695:
1691:
1688:
1685:
1684:
1681:
1677:
1673:
1669:
1666:
1660:
1656:
1651:
1648:
1645:
1644:
1641:
1637:
1633:
1629:
1625:
1621:
1617:
1614:
1608:
1604:
1599:
1595:
1591:
1587:
1583:
1579:
1576:
1573:
1572:
1560:
1556:
1551:
1547:
1541:
1537:
1534:
1529:
1527:
1524:
1523:
1520:
1516:
1512:
1508:
1505:
1503:
1500:
1499:
1495:
1491:
1488:
1485:
1480:
1476:
1472:
1468:
1465:
1461:
1457:
1454:
1449:
1445:
1444:
1440:
1436:
1433:
1430:
1428:
1425:
1421:
1418:
1414:
1410:
1407:
1404:
1399:
1394:
1390:
1386:
1382:
1379:
1375:
1371:
1368:
1365:
1362:
1358:
1354:
1351:
1348:
1347:
1343:
1339:
1335:
1331:
1327:
1324:
1320:
1315:
1311:
1307:
1304:
1303:
1300:
1296:
1292:
1288:
1284:
1281:
1275:
1271:
1268:
1265:
1260:
1256:
1253:
1250:
1247:
1243:
1239:
1236:
1233:
1232:
1229:translation)
1228:
1224:
1221:
1217:
1211:
1208:
1205:
1204:
1201:
1197:
1193:
1189:
1186:
1182:
1179:
1176:
1172:
1168:
1165:
1162:
1157:
1153:
1150:
1146:
1143:
1139:
1136:
1133:
1129:
1124:
1120:
1117:
1113:
1110:
1107:
1104:
1101:
1100:
1097:
1093:
1090:
1087:
1075:
1071:
1068:
1065:
1063:
1058:
1054:
1051:
1047:
1046:IBM PC/XT 286
1043:
1040:
1037:
1034:
1031:
1028:
1026:
1023:
1022:
1018:
1015:
1011:
1007:
1004:
1000:
996:
992:
988:
985:
982:
970:
966:
963:
960:
958:
951:
948:
945:
943:
940:
938:
935:
934:
928:
927:Address space
920:Introduction
915:
909:
899:
896:
888:
877:
874:
870:
867:
863:
860:
856:
853:
849:
846: –
845:
841:
840:Find sources:
834:
830:
824:
823:
818:This article
816:
812:
807:
806:
798:
795:
791:
787:
783:
779:
775:
771:
767:
761:
759:
755:
751:
747:
743:
739:
735:
731:
727:
723:
719:
714:
712:
708:
704:
700:
697:
696:supercomputer
693:
689:
685:
681:
676:
674:
670:
666:
662:
658:
654:
650:
646:
641:
639:
635:
632:
628:
624:
614:
612:
608:
604:
600:
596:
592:
588:
583:
581:
577:
573:
569:
565:
560:
558:
554:
550:
546:
541:
537:
533:
530:extension of
529:
525:
521:
518:based on the
517:
513:
509:
505:
501:
497:
489:
481:
473:
462:
458:
454:
450:
446:
443:
439:
435:
432:
428:
427:
425:
423:
419:
412:
409:
406:
405:
403:
401:
397:
394:
390:
386:
382:
378:
374:
370:
366:
362:
359:
355:
351:
347:
343:
339:
335:
331:
327:
323:
319:
315:
311:
307:
303:
299:
295:
291:
287:
283:
279:
275:
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259:
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219:
215:
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207:
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187:
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176:
171:
165:
162:
157:
153:
148:
144:
141:
137:
133:
131:
127:
124:
121:
119:
115:
111:
109:
105:
102:
99:
95:
92:
89:
87:
83:
79:
75:
72:
68:
64:
61:
57:
54:
50:
47:
43:
37:
33:
19:
12656:Chip carrier
12594:Clock gating
12513:Mixed-signal
12410:Write buffer
12387:Control unit
12199:Clock signal
11938:accelerators
11920:Cypress PSoC
11577:Simultaneous
11394:Out-of-order
11166:
11026:Neuromorphic
10907:Architecture
10865:Belt machine
10858:Zeno machine
10791:Hierarchical
10658:Intel Museum
10588:
10581:
10574:
10570:Inside Films
10562:
10508:Classmate PC
10438:Andrew Grove
10434:Gordon Moore
10431:Robert Noyce
10416:Robert Noyce
10411:Gordon Moore
9713:
9642:Discontinued
9500:
9479:Cypress Cove
9438:Sandy Bridge
9175:
9101:Intel Reader
8968:
8956:
8950:Subsidiaries
8901:
8784:cryptography
8671:
8617:
8296:Machine code
8281:Disassembler
8164:(5): 39–47.
8161:
8157:
8136:. Retrieved
8131:
8122:
8110:. Retrieved
8106:
8096:
8087:
8077:
8065:. Retrieved
8061:
8051:
8039:. Retrieved
8035:
8025:
8013:. Retrieved
8009:
7999:
7987:. Retrieved
7984:The Register
7983:
7973:
7961:. Retrieved
7955:
7945:
7935:December 22,
7933:. Retrieved
7917:
7910:
7898:. Retrieved
7894:the original
7889:The Inquirer
7887:
7877:
7865:. Retrieved
7853:
7841:
7832:
7825:. Retrieved
7805:
7797:
7792:December 19,
7790:. Retrieved
7786:the original
7771:
7762:
7755:. Retrieved
7743:
7737:"Appendix E"
7730:
7718:. Retrieved
7713:
7689:. Retrieved
7676:
7664:. Retrieved
7660:
7651:
7639:. Retrieved
7635:
7626:
7614:. Retrieved
7610:
7600:
7583:
7579:
7569:
7557:. Retrieved
7553:the original
7548:
7522:. Retrieved
7518:the original
7508:
7496:. Retrieved
7480:
7474:
7462:. Retrieved
7446:
7440:
7428:. Retrieved
7412:
7406:
7394:. Retrieved
7378:
7372:
7360:. Retrieved
7351:
7342:
7330:. Retrieved
7314:
7308:
7300:
7293:. Retrieved
7279:
7267:. Retrieved
7253:
7226:
7220:
7208:. Retrieved
7198:
7177:. Retrieved
7161:
7155:
7143:. Retrieved
7123:
7111:. Retrieved
7091:
7079:. Retrieved
7070:
7061:
7049:. Retrieved
7035:
7023:. Retrieved
7017:
7007:
6998:
6989:
6977:. Retrieved
6963:
6951:. Retrieved
6947:
6938:
6926:. Retrieved
6922:
6913:
6901:. Retrieved
6897:
6888:
6876:. Retrieved
6867:
6858:
6850:
6843:. Retrieved
6827:Fog, Agner.
6807:. Retrieved
6772:. Retrieved
6766:
6756:
6748:
6745:the original
6731:
6709:(1): 75–79.
6706:
6702:
6696:
6684:. Retrieved
6680:the original
6675:
6665:
6653:. Retrieved
6637:
6616:. Retrieved
6600:
6594:
6582:. Retrieved
6567:
6559:
6554:November 23,
6552:. Retrieved
6543:
6533:
6522:
6512:
6493:
6487:
6468:
6464:
6458:
6443:
6432:
6413:
6403:
6393:
6384:
6371:
6362:
6349:
6344:
6335:
6322:
6312:
6299:
6290:
6282:
6278:
6269:
6258:multiplexers
6248:
6223:
6216:GRID Compass
6210:
6197:
6059:
6039:
6031:
6012:
5945:
5873:
5862:
5854:
5852:
5832:
5808:
5804:
5739:
5730:
5719:Please help
5714:verification
5711:
5660:
5645:
5637:
5614:
5606:
5587:
5580:
5535:
5516:
5480:
5478:
5473:
5471:
5456:
5441:
5433:
5424:
5407:
5381:
5377:
5356:
5354:
5349:
5345:
5341:
5337:
5333:
5331:
5322:
5312:
5296:
5280:
5274:
5272:
5242:
5226:
5211:
5207:
5195:base address
5164:
5149:
5143:January 2014
5140:
5129:Please help
5124:verification
5121:
5080:
5065:boot loaders
5058:
5043:
5027:multitasking
5008:
4993:
4987:January 2014
4984:
4973:Please help
4968:verification
4965:
4879:
4817:
4608:minicomputer
4603:
4599:
4597:
4592:
4585:
4579:
4576:
4553:
4540:
4539:DI/EDI/RDI:
4530:Source index
4529:
4528:SI/ESI/RSI:
4500:
4488:
4469:
4458:
4450:
4432:
4414:
4382:
4376:
4346:
4335:
4330:machine code
4327:
4318:
4308:
4276:
4265:
4253:
4230:
4226:
4198:
4142:
4136:(as used in
4127:
3810:
3285:
3033:
3020:just-in-time
3010:
3002:
2998:
2990:
2926:out of order
2910:control unit
2903:
2878:Sandy Bridge
2874:
2840:A dedicated
2839:
2826:
2795:
2779:
2743:
2730:
2716:
2704:
2677:
2619:
2592:
2577:
2547:
2488:
2469:
2386:
2234:Cypress Cove
1906:Sandy Bridge
1768:(45 nm)
1766:Intel Core 2
1690:Intel Core 2
1258:
1238:Cyrix Cx5x86
1155:
1102:
1061:
1024:
956:
906:
891:
882:
872:
865:
858:
851:
839:
827:Please help
822:verification
819:
769:
762:
715:
692:workstations
677:
672:
668:
664:
660:
649:coprocessors
642:
620:
584:
561:
503:
499:
495:
494:
36:
12441:Multiplexer
12405:Data buffer
12116:Single-core
12088:bit slicing
11946:Coprocessor
11801:Coprocessor
11682:performance
11604:Cooperative
11594:Speculative
11554:Distributed
11513:Superscalar
11498:Instruction
11466:Parallelism
11439:Speculative
11271:System/3x0
11143:Instruction
10920:Von Neumann
10833:Post–Turing
10638:Intel Teach
9491:Golden Cove
9486:Willow Cove
9467:Cannon Lake
9076:Intel AZ210
9066:Hella Zippy
8768:MIPS16e ASE
8375:Programming
8138:October 22,
8112:October 22,
8067:October 22,
8041:October 22,
8015:October 22,
7989:October 22,
7963:October 22,
7661:web.mit.edu
7498:January 27,
7464:January 27,
7295:January 15,
7269:February 6,
6923:m.hexus.net
6254:7400 series
6243:processors.
6201:Unlike the
6033:support to
5898:Intel Quark
5881:AMD Opteron
5666:Pentium Pro
5463:Pentium MMX
5214:Intel 80386
5055:Unreal mode
5049:Unreal mode
4582:accumulator
4536:operations.
4523:stack frame
4379:AMD Opteron
4357:Pentium III
4349:Pentium MMX
4279:Intel 80286
4256:Intel 80186
2952:, and some
2922:superscalar
2864:-unit (see
2658:superscalar
2510:superscalar
2506:trademarked
2273:Willow Cove
2238:Rocket Lake
2232:-U and Y),
2195:Series/AMD
2120:Rocket Lake
2116:Coffee Lake
2112:Cannon Lake
2064:Broadwell-U
1946:Socket FM2+
1832:; adaptive
1542:(2001–2017)
1490:μ-op fusion
1314:Pentium III
1274:Pentium Pro
1244:/MX (1997)/
1181:Superscalar
1175:Pentium MMX
1161:Superscalar
1112:Intel 80486
1070:Intel 80386
1030:Intel 80286
1016:/V30 (1983)
1010:Intel 80188
1006:Intel 80186
607:workstation
595:smartphones
504:8086 family
369:Pentium Pro
12671:Categories
12561:management
12456:Multiplier
12317:Logic gate
12307:Sequential
12214:Functional
12194:Clock rate
12167:Data cache
12140:Components
12121:Multi-core
12109:Core count
11599:Preemptive
11503:Pipelining
11486:Bit-serial
11429:Wide-issue
11374:Structural
11296:Tilera ISA
11262:MicroBlaze
11232:ETRAX CRIS
11127:Comparison
10972:Load–store
10952:Endianness
10356:Litigation
10286:Intel GPUs
10000:Core-based
9764:(external
9652:oriented (
9522:Silvermont
9474:Sunny Cove
9443:Ivy Bridge
9226:Processors
9071:Intel 1103
8496:extensions
8394:Carry flag
8384:Call stack
8316:Assemblers
7900:October 7,
7245:1050453850
7145:August 28,
7081:August 26,
6878:January 5,
6655:August 28,
6618:August 28,
6425:References
6317:software).
6262:glue logic
6037:(GCC) 14.
6004:VirtualBox
5976:VMware ESX
5926:smartphone
5902:Intel Atom
5885:Intel Xeon
5733:March 2016
5489:doubleword
5467:Intel i860
5387:Extensions
5237:Windows NT
5177:to 1
5089:), not by
5075:See also:
4445:See also:
4427:See also:
4409:See also:
4241:carry flag
4201:Intel 8086
4173:interrupts
4157:64 KB
4145:64 KB
2958:Intel Core
2956:and later
2772:, and the
2666:Intel Atom
2624:(formerly
2541:to enable
2496:, in 1993
2449:processors
2311:(5800X3D)
2295:Alder Lake
2277:Tiger Lake
2226:Sunny Cove
1993:Silvermont
1942:Socket FM2
1931:and later)
1910:Ivy Bridge
1871:Socket FM1
1782:Intel Atom
1720:AMD Phenom
1652:(Prescott)
1628:Socket 754
1565:since 2001
1479:Intel Core
1464:Socket 478
1338:Socket 370
1310:Pentium II
1297:, on-chip
1242:Cyrix 6x86
1138:pipelining
1094:, paging,
1032:and clones
969:Intel 8088
965:Intel 8086
885:March 2020
855:newspapers
801:Chronology
770:Intel 8800
754:Intel Atom
750:Athlon Neo
613:segments.
182:Extensions
130:Endianness
77:Introduced
12495:Circuitry
12415:Microcode
12339:Registers
12182:coherence
12157:CPU cache
12015:Word size
11680:Processor
11324:Execution
11227:DEC Alpha
11205:Power ISA
11021:Cognitive
10828:Universal
10598:Intel ADX
10338:Codenames
10251:StrongARM
10089:Dual-Core
10062:Dual-Core
9973:Dual-Core
9943:OverDrive
9892:A100/A110
9885:OverDrive
9679:pre-x86 (
9546:Gracemont
9455:Broadwell
9136:Omni-Path
9026:3D XPoint
8986:Virtutech
8585:Power ISA
8566:MIPS SIMD
8451:Registers
8414:Zero flag
8166:CiteSeerX
8010:AnandTech
7867:April 24,
7782:Techworld
7757:April 13,
7636:AnandTech
7592:1937-4771
7430:April 23,
7396:April 23,
7352:CPU-world
7332:April 23,
7210:March 19,
7179:March 28,
7113:March 28,
7073:. Intel.
6868:OpenCores
6584:April 18,
6544:ICloud PE
5848:long mode
5823:emulation
5795:Power ISA
5687:long mode
5683:long mode
5639:masking,
5593:Pentium 4
5457:MMX is a
5414:numerical
5313:In 1999,
5293:Long mode
5287:Long mode
5245:real mode
4947:Real mode
4941:Real mode
4614:Structure
4586:add to AL
4564:SS: Stack
4391:long mode
4249:zero flag
4235:contains
3977:∗
3966:⋮
3942:⋮
3909:⋮
3885:⋮
3702:∗
3012:Transmeta
2994:microcode
2968:with two
2950:Pentium 4
2918:pipelined
2906:execution
2894:Skylake-X
2786:long mode
2758:Microsoft
2634:Transmeta
2582:lacked a
2529:(M1) and
2491:pipelined
2221:2018–2021
2108:Kaby Lake
2099:2015–2020
2027:Broadwell
1809:Clarkdale
1734:Turion II
1729:Athlon II
1659:Pentium D
1655:Celeron D
1650:Pentium 4
1603:Turion 64
1578:Athlon 64
1532:1999–2005
1475:Pentium M
1448:Pentium 4
1389:Athlon XP
1140:, on-die
1128:AMD Am486
1074:AMD Am386
1050:IBM PC/AT
995:IBM PC/XT
790:circuitry
778:Intel 860
774:Intel 960
722:low power
684:Zilog Z80
393:Registers
139:Page size
118:Branching
12433:Datapath
12126:Manycore
12098:variable
11936:Hardware
11572:Temporal
11252:OpenRISC
10947:Cellular
10937:Dataflow
10930:modified
10498:ASCI Red
10458:Bob Swan
10404:Founders
10343:Larrabee
10221:iAPX 432
10156:11th gen
10151:10th gen
9990:P6-based
9880:RapidCAD
9622:14th gen
9617:13th gen
9612:12th gen
9607:11th gen
9602:10th gen
9529:Goldmont
9517:Saltwell
9431:Westmere
9391:NetBurst
9337:Chipsets
9116:Intel740
9019:Products
8976:Mobileye
8891:(AMD-Vi)
8324:A86/A386
8188:10385623
8107:Phoronix
7926:Archived
7858:Archived
7827:April 9,
7818:Archived
7748:Archived
7524:July 18,
7489:Archived
7455:Archived
7421:Archived
7387:Archived
7362:July 21,
7356:Archived
7323:Archived
7289:Archived
7263:Archived
7204:Archived
7170:Archived
7136:Archived
7104:Archived
7075:Archived
7045:Archived
7019:Phoronix
6973:Archived
6953:April 5,
6928:April 5,
6903:April 5,
6872:Archived
6845:March 7,
6836:Archived
6809:March 7,
6800:Archived
6723:16451604
6646:Archived
6609:Archived
6578:Archived
6548:Archived
6418:segment.
6084:See also
5990:, while
5932:market.
5918:clusters
5879:(in its
5856:Prescott
5797:used by
5770:clusters
5588:Prescott
5485:quadword
5429:de facto
5350:Intel 64
5281:V86 mode
4561:DS: Data
4558:CS: Code
4239:such as
3006:NetBurst
2978:Xeon Phi
2886:Xeon Phi
2654:VIA Nano
2445:DM&P
2429:Intersil
2279:-Y/U/H)
2230:Ice Lake
2155:Xeon Phi
2052:LGA 1150
1954:Xeon Phi
1917:LGA 1155
1825:VIA Nano
1705:Intel 64
1676:Intel VT
1588:(2005),
1417:Socket A
1321:(1998),
1299:L2 cache
1278:36-bit (
1130:(1993),
1096:IBM PS/2
993:(8088),
947:Physical
766:iAPX 432
738:VIA Nano
707:software
699:clusters
651:such as
617:Overview
534:Intel's
373:NetBurst
314:AVX-VNNI
168:(Legacy
108:Encoding
45:Designer
12609:Related
12540:Quantum
12530:Digital
12525:Boolean
12423:Counter
12322:Quantum
12083:512-bit
12078:256-bit
12073:128-bit
11916:(MPSoC)
11901:on chip
11899:Systems
11717:(FLOPS)
11530:Process
11379:Control
11361:Hazards
11247:Itanium
11242:Unicore
11200:PowerPC
10925:Harvard
10885:Pointer
10880:Counter
10838:Quantum
10476:Related
10333:Stratix
10269:Related
10231:Itanium
10146:9th gen
10141:8th gen
10136:7th gen
10131:6th gen
10126:5th gen
10121:4th gen
10116:3rd gen
10111:2nd gen
10106:1st gen
10069:Pentium
10052:Celeron
10012:Tolapai
9933:Pentium
9916:(1998)
9914:Celeron
9805:80387DX
9797:80387SX
9592:Pentium
9587:Celeron
9541:Tremont
9512:Bonnell
9462:Skylake
9450:Haswell
9426:Nehalem
9325:Itanium
9241:Pentium
9236:Celeron
9126:IXP1200
9121:InTru3D
9011:Vantiva
8792:PadLock
8707:AVX-512
8573:PA-RISC
8556:MIPS-3D
7720:June 5,
7691:June 5,
7666:June 5,
7641:June 5,
7616:June 5,
7559:June 5,
7025:May 20,
6774:June 2,
6676:PCWorld
6354:Pentium
6327:Fabless
6127:PowerPC
6111:Itanium
6074:AVX-512
5968:Hyper-V
5836:Opteron
5815:Itanium
5813:in its
5791:Itanium
5779:PA-RISC
5774:TOP 500
5634:AVX-512
5551:and AVX
5361:Solaris
5249:booting
4497:Purpose
4490:AVX-512
4441:512-bit
4435:AVX-512
4423:256-bit
4417:AVX-512
4405:128-bit
4277:In the
2970:threads
2954:Nehalem
2948:, some
2904:During
2890:AVX-512
2829:opcodes
2822:offsets
2818:integer
2707:Zhaoxin
2696:Zet SoC
2673:Pentium
2650:Centaur
2615:Opteron
2502:Pentium
2433:C&T
2421:Siemens
2413:Fujitsu
2361:History
2327:Raphael
2314:48-bit
2309:Vermeer
2260:48-bit
2256:Matisse
2214:Zhaoxin
2137:Core i9
2133:Core i7
2129:Core i5
2125:Core i3
2104:Skylake
2089:Celeron
2085:Pentium
2077:Core i7
2073:Core i5
2054:socket
2023:Haswell
2019:Core i7
2015:Core i5
1919:socket
1901:Core i7
1897:Core i5
1802:Core i3
1797:Core i5
1793:Core i7
1680:LGA 775
1605:(2005)/
1596:(2004)/
1594:Sempron
1590:Opteron
1548:64-bit
1540:Itanium
1509:6.0.4,
1403:Sempron
1359:(1998)/
1344:(Xeon)
1319:Celeron
1188:databus
1171:Pentium
1014:NEC V20
997:(8088)
942:Virtual
869:scholar
782:Itanium
772:), the
701:of the
636:of the
599:tablets
587:desktop
510:(CISC)
502:or the
381:Opteron
164:Pentium
12545:Switch
12535:Analog
12273:(IMC)
12244:(MMU)
12093:others
12068:64-bit
12063:48-bit
12058:32-bit
12053:24-bit
12048:16-bit
12043:15-bit
12038:12-bit
11875:Mobile
11791:Stream
11786:Barrel
11781:Vector
11770:(GPU)
11729:(SUPS)
11697:(IPC)
11549:Memory
11542:Vector
11525:Thread
11508:Scalar
11310:Others
11257:RISC-V
11222:SuperH
11191:Power
11187:MIPS-X
11162:PDP-11
11011:Fabric
10763:Models
10703:Tarari
10576:Inside
10397:People
10256:XScale
10026:64-bit
10022:x86-64
9927:(2004)
9824:32-bit
9787:80C187
9780:(1980)
9753:(1982)
9747:(1982)
9741:(1982)
9735:(1979)
9729:(1978)
9718:16-bit
9712:Early
9704:(1977)
9698:(1974)
9692:(1972)
9671:(1974)
9665:(1971)
9573:64-bit
9569:x86-64
9419:Penryn
9405:64-bit
9401:x86-64
9360:32-bit
8996:Xircom
8964:Altera
8958:3Dlabs
8885:(2006)
8879:(2005)
8855:(2013)
8836:(2021)
8830:(2015)
8824:(2015)
8818:(2013)
8812:(2012)
8810:RDRAND
8806:(2010)
8798:AES-NI
8794:(2003)
8746:(2014)
8721:(2023)
8715:(2022)
8709:(2015)
8703:(2013)
8691:(2009)
8685:(2009)
8679:(2008)
8672:(2007)
8665:(2006)
8659:(2006)
8653:(2004)
8647:(2001)
8641:(1999)
8635:(1998)
8633:3DNow!
8629:(1996)
8426:Opcode
8377:issues
8367:(WASM)
8361:(TASM)
8355:(NASM)
8349:(MASM)
8331:(FASM)
8264:Topics
8186:
8168:
7590:
7243:
7233:
6721:
6500:
6475:
6377:PDP-11
6116:x86-64
6006:, and
5930:tablet
5910:AMD FX
5865:NX bit
5844:x86-64
5757:x86-64
5693:x86-64
5678:x86-64
5641:gather
5597:thread
5575:, and
5531:Athlon
5513:3DNow!
5507:3DNow!
5338:x86-64
5334:x86-64
5323:x86-64
5319:64-bit
5233:386BSD
5218:paging
5169:to 16
4602:byte (
4589:opcode
4534:string
4387:x86-64
4373:x86-64
4367:64-bit
4297:32-bit
4195:16-bit
3874:
3871:
3406:
3403:
3123:
3120:
3016:Crusoe
2940:, and
2766:Oracle
2750:x86-64
2632:, and
2611:Athlon
2565:NexGen
2465:Weitek
2443:, and
2437:NexGen
2333:RDNA 2
2293:Intel
2282:57-bit
2271:Intel
2243:57-bit
2224:Intel
2199:Series
2164:48-bit
2153:Intel
2142:46-bit
2102:Intel
2081:Core M
2062:Intel
2032:39-bit
1999:36-bit
1991:Intel
1977:Jaguar
1952:Intel
1934:48-bit
1884:36-bit
1879:Bobcat
1866:40-bit
1848:48-bit
1844:AMD FX
1813:SSE4.2
1804:(2010)
1799:(2009)
1791:Intel
1775:SSE4.1
1771:40-bit
1739:48-bit
1736:(2009)
1731:(2009)
1726:(2008)
1701:(2008)
1696:(2007)
1664:36-bit
1661:(2005)
1612:40-bit
1609:(2006)
1600:(2008)
1559:x86-64
1545:52-bit
1538:Intel
1515:NX bit
1513:-256,
1494:XD bit
1486:(2007)
1481:(2006)
1473:Intel
1452:36-bit
1446:Intel
1431:32-bit
1413:Slot A
1408:36-bit
1405:(2004)
1400:(2000)
1395:(2001)
1385:Athlon
1370:3DNow!
1366:32-bit
1363:(1999)
1361:K6-III
1353:AMD K6
1342:Slot 2
1334:Slot 1
1325:(1998)
1316:(1999)
1308:Intel
1272:Intel
1248:(1998)
1222:(1996)
1210:NexGen
1185:64-bit
1177:(1996)
1169:Intel
1134:(1995)
1132:Am5x86
1125:(1992)
1119:Cx486S
1089:32-bit
1085:32-bit
1082:46-bit
1079:32-bit
1076:(1991)
1038:24-bit
1035:30-bit
991:IBM PC
984:16-bit
980:20-bit
974:16-bit
971:(1979)
953:x86-16
937:Linear
871:
864:
857:
850:
842:
758:64-bit
734:VIA C7
730:RISC-V
703:TOP500
631:32-bit
591:laptop
580:IBM PC
528:16-bit
461:AVX512
385:AMD K8
342:AMD-Vi
318:AVX512
266:RDRAND
250:AES-NI
246:SSE4.2
226:NX bit
206:3DNow!
194:x86-64
175:x86-64
149:: None
134:Little
86:Design
71:64-bit
67:32-bit
63:16-bit
12601:(PPW)
12559:Power
12451:Adder
12327:Array
12294:Logic
12255:(TLB)
12238:(FPU)
12232:(AGU)
12226:(ALU)
12216:units
12152:Cache
12033:8-bit
12028:4-bit
12023:1-bit
11987:(TPU)
11981:(DSP)
11975:(PPU)
11969:(VPU)
11958:(GPU)
11927:(NoC)
11910:(SoC)
11845:(PoP)
11839:(SiP)
11833:(MCM)
11774:GPGPU
11764:(CPU)
11754:Types
11735:(PPW)
11723:(TPS)
11711:(IPS)
11703:(CPI)
11474:Level
11285:S/390
11280:S/370
11275:S/360
11217:SPARC
11195:POWER
11078:TRIPS
11046:Types
10663:OnCue
10328:PIIXs
10209:Other
10007:Quark
9820:IA-32
9810:80487
9792:80287
9751:80286
9745:80188
9739:80186
9681:8-bit
9654:4-bit
9356:IA-32
9320:Quark
9219:Lists
9155:X25-M
9131:OFono
8943:Intel
8883:AMD-V
8804:CLMUL
8763:Thumb
8719:AVX10
8657:SSSE3
8597:SPARC
8517:Alpha
8389:Flags
8343:(HLA)
8337:(GAS)
8184:S2CID
8132:Intel
7957:Intel
7929:(PDF)
7922:(PDF)
7861:(PDF)
7850:(PDF)
7821:(PDF)
7814:(PDF)
7764:page.
7751:(PDF)
7740:(PDF)
7685:(PDF)
7492:(PDF)
7485:(PDF)
7458:(PDF)
7451:(PDF)
7424:(PDF)
7417:(PDF)
7390:(PDF)
7383:(PDF)
7326:(PDF)
7319:(PDF)
7173:(PDF)
7166:(PDF)
7139:(PDF)
7132:(PDF)
7107:(PDF)
7100:(PDF)
6999:Intel
6839:(PDF)
6832:(PDF)
6803:(PDF)
6796:(PDF)
6768:eWeek
6719:S2CID
6649:(PDF)
6642:(PDF)
6612:(PDF)
6605:(PDF)
6241:80286
6237:80188
6233:80186
6190:Notes
6121:680x0
6106:CPUID
5914:Ryzen
5893:SPARC
5811:IA-64
5787:Alpha
5783:SPARC
5610:AMD64
5569:SSSE3
5373:macOS
5346:EM64T
5342:AMD64
5229:Linux
5035:80186
5031:80286
4342:80486
4338:80387
4311:80386
4291:80287
4272:fstsw
4260:80188
4237:flags
4214:stack
4169:SS:SP
4161:stack
2932:(via
2854:80387
2754:AMD64
2739:IA-64
2735:IA-32
2684:Cyrix
2580:Nx586
2569:Nx586
2519:Cyrix
2498:Intel
2425:Cyrix
2375:Am386
2322:2022
2304:2022
2251:2019
2193:Ryzen
1861:Llano
1744:SSE4a
1709:SSSE3
1668:EM64T
1624:AMD-V
1616:AMD64
1526:IA-64
1398:Duron
1212:Nx586
1149:cache
1116:Cyrix
1057:IA-32
876:JSTOR
862:books
844:"X86"
746:Geode
638:80386
627:80286
557:80486
553:80386
549:80286
545:80186
532:8-bit
516:Intel
500:80x86
338:AMD-V
322:AVX10
254:CLMUL
238:SSSE3
190:IA-32
49:Intel
32:IA-32
12579:ACPI
12312:Glue
12204:FIFO
12147:Core
11885:ASIP
11826:CPLD
11821:FPOA
11816:FPGA
11811:ASIC
11664:SPMD
11659:MIMD
11654:MISD
11647:SWAR
11627:SIMD
11622:SISD
11537:Data
11520:Task
11491:Word
11237:M32R
11182:MIPS
11145:sets
11112:ZISC
11107:NISC
11102:OISC
11097:MISC
11090:EPIC
11085:VLIW
11073:EDGE
11063:RISC
11058:CISC
10967:HUMA
10962:NUMA
10503:BiiN
10425:CEOs
10323:ICHs
10318:SCHs
10313:PCHs
10246:i960
10241:i860
10236:RISC
10226:EPIC
10216:CISC
10168:Xeon
10096:Core
10035:Atom
9985:Xeon
9980:Core
9897:Atom
9855:i486
9833:i386
9826:x86)
9778:8087
9766:FPUs
9733:8088
9727:8086
9702:8085
9696:8080
9690:8008
9669:4040
9663:4004
9629:Xeon
9597:Core
9582:Atom
9414:Core
9362:x86)
9315:Xeon
9278:Core
9231:Atom
9171:WiDi
9151:SSDs
8889:VT-d
8877:VT-x
8701:AVX2
8683:F16C
8669:SSE5
8663:SSE4
8651:SSE3
8645:SSE2
8614:SIMD
8551:MDMX
8546:MIPS
8534:NEON
8508:RISC
8504:SIMD
8140:2023
8114:2023
8069:2023
8043:2023
8017:2023
7991:2023
7965:2023
7937:2006
7902:2009
7869:2024
7829:2010
7794:2010
7759:2017
7722:2022
7693:2022
7668:2022
7643:2022
7618:2022
7588:ISSN
7561:2022
7526:2008
7500:2014
7466:2014
7432:2013
7398:2013
7364:2016
7334:2013
7297:2020
7271:2014
7241:OCLC
7231:ISBN
7212:2014
7181:2018
7147:2017
7115:2018
7083:2013
7053:2014
7027:2023
6981:2014
6955:2022
6930:2022
6905:2022
6880:2014
6847:2020
6811:2020
6776:2022
6688:2014
6657:2017
6620:2017
6586:2014
6556:2020
6498:ISBN
6473:ISBN
6330:AMD.
6277:was
6275:iAPX
6239:and
6229:8088
6214:The
6168:iAPX
6070:AVX2
6062:REX2
5996:QEMU
5986:and
5954:and
5928:and
5908:and
5900:and
5883:and
5632:and
5577:SSE5
5573:SSE4
5565:SSE3
5561:SSE2
5529:and
5501:NaNs
5497:byte
5493:word
5459:SIMD
5421:8087
5302:and
5235:and
5212:The
5199:ring
5087:UEFI
5083:BIOS
5039:BIOS
5015:CPUs
5011:8086
4922:EIP
4915:RIP
4874:?IL
4860:E?I
4853:R?I
4812:?PL
4798:E?P
4791:R?P
4657:E?X
4650:R?X
4532:for
4465:IDTR
4347:The
4287:IDTR
4268:8087
4258:and
4254:The
4247:and
4231:The
4205:8088
4203:and
3024:VLIW
2974:core
2972:per
2928:and
2862:SIMD
2850:8086
2846:8087
2810:8080
2808:and
2806:8008
2798:CISC
2782:X86S
2774:BSDs
2760:and
2723:word
2717:The
2660:and
2644:and
2613:and
2599:6x86
2561:RISC
2550:5k86
2533:MX (
2531:6x86
2527:6x86
2523:5x86
2494:i486
2484:i486
2482:and
2480:i386
2340:Era
2325:AMD
2307:AMD
2290:2021
2268:2020
2254:AMD
2207:2017
2197:Epyc
2191:AMD
2188:2017
2175:AMD
2172:2016
2150:2016
2059:2015
2040:FMA3
2036:AVX2
2017:and
1975:AMD
1972:2013
1965:P54C
1924:2012
1899:and
1856:2011
1840:2010
1762:2008
1752:AM2+
1716:2007
1686:2006
1672:SSE3
1646:2004
1574:2003
1550:EPIC
1535:2001
1511:VLIW
1470:2003
1456:SSE2
1439:VLIW
1423:2000
1383:AMD
1380:1999
1357:K6-2
1349:1997
1323:Xeon
1305:1997
1269:1995
1234:1995
1227:μ-op
1216:5k86
1214:AMD
1206:1994
1196:APIC
1166:1993
1108:1989
1066:1985
1002:1982
961:1978
917:Era
848:news
792:and
752:and
669:iSBX
665:iSBC
661:iRMX
657:8089
655:and
653:8087
625:and
623:8088
609:and
589:and
555:and
536:8080
524:8088
520:8086
459:and
457:AVX2
453:SSE2
451:and
377:i686
364:Open
334:VT-d
330:VT-x
310:AVX2
290:F16C
242:SSE4
234:SSE3
222:SSE2
218:ACPI
198:X86S
156:i486
152:i386
147:i286
143:8086
97:Type
91:CISC
69:and
59:Bits
12574:APM
12569:PMU
12461:CPU
12418:ROM
12189:Bus
11806:PAL
11481:Bit
11267:LMC
11172:ARM
11167:x86
11157:VAX
10306:Arc
10291:GMA
10040:SoC
9958:III
9948:Pro
9907:SoC
9870:DX4
9865:DX2
9843:376
9762:x87
9714:x86
9650:BCD
9504:ULV
9501:x86
9256:III
9246:Pro
9176:x86
8859:ASF
8853:TSX
8834:TDX
8828:SGX
8822:MPX
8816:SHA
8773:RVC
8744:ADX
8738:BMI
8713:AMX
8695:FMA
8689:XOP
8677:AVX
8639:SSE
8627:MMX
8618:x86
8602:VIS
8590:VMX
8578:MAX
8561:MXU
8539:SVE
8529:ARM
8522:MVI
8176:doi
6741:AMD
6711:doi
6471:).
6066:AVX
6017:AES
6008:Xen
5922:ARM
5891:or
5765:In
5723:by
5670:AMD
5548:SSE
5474:MMn
5447:MMX
5398:x87
5369:BSD
5357:x64
5315:AMD
5308:EiB
5133:by
5025:or
5019:MiB
4977:by
4929:IP
4907:16
4904:24
4901:32
4898:40
4895:48
4892:56
4889:64
4867:?I
4845:16
4842:24
4839:32
4836:40
4833:48
4830:56
4827:64
4805:?P
4783:16
4780:24
4777:32
4774:40
4771:48
4768:56
4765:64
4753:?S
4745:16
4733:?B
4726:?W
4719:?D
4704:16
4701:24
4698:32
4695:40
4692:48
4689:56
4686:64
4674:?L
4671:?H
4664:?X
4642:16
4639:24
4636:32
4633:40
4630:48
4627:56
4624:64
4600:sib
4353:MMX
4209:bit
4153:I/O
2988:).
2986:TSX
2962:Zen
2866:SSE
2746:AMD
2688:AMD
2628:),
2626:IDT
2603:AMD
2567:'s
2558:29K
2535:MII
2515:IBM
2453:x87
2441:UMC
2417:OKI
2409:STM
2401:AMD
2397:NEC
2393:VIA
2389:IBM
2044:TSX
2003:SoC
1984:SoC
1944:or
1938:AVX
1811:),
1756:AM3
1754:or
1640:AM2
1638:or
1636:940
1632:939
1507:CMS
1460:HTT
1435:CMS
1415:or
1340:or
1330:SSE
1295:PAE
1280:PAE
1264:PAE
1259:6th
1246:MII
1200:SMP
1192:MMX
1156:5th
1145:FPU
1142:x87
1123:DLC
1103:4th
1092:ISA
1062:3rd
1025:2nd
987:ISA
957:1st
831:by
744:'s
742:AMD
603:ARM
597:or
496:x86
449:x87
442:SSE
438:x87
433:FPU
431:x87
358:APX
354:TXT
350:ASF
346:TSX
326:AMX
306:AVX
302:FMA
298:BMI
294:ADX
286:XOP
282:SGX
278:SME
274:MPX
270:SHA
262:SM4
258:SM3
230:SMT
214:MCA
210:SSE
202:MMX
186:x87
170:PAE
53:AMD
40:x86
12673::
12508:3D
10301:Xe
10045:CE
9953:II
9902:CE
9875:SL
9860:SX
9848:EX
9838:SX
9374:P6
9369:P5
9303:i9
9298:i7
9293:i5
9288:i3
9251:II
8182:.
8174:.
8162:38
8160:.
8130:.
8105:.
8086:.
8060:.
8034:.
8008:.
7982:.
7954:.
7886:.
7852:.
7831:.
7796:.
7780:.
7761:.
7742:.
7712:.
7701:^
7659:.
7609:.
7584:19
7582:.
7578:.
7547:.
7534:^
7354:.
7350:.
7299:.
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7239:.
7189:^
7069:.
7043:.
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6866:.
6849:.
6819:^
6784:^
6765:.
6717:.
6707:32
6705:.
6674:.
6628:^
6558:.
6542:.
6521:.
6351:P5
6235:,
6231:,
6010:.
6002:,
5998:,
5982:,
5978:,
5974:,
5970:,
5871:.
5840:GB
5785:,
5781:,
5674:GB
5571:,
5567:,
5563:,
5559:,
5527:K6
5519:3D
5352:.
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5171:MB
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1336:,
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