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322:. These computers had many limited-functionality processors that would work in parallel. For example, each of 65,536 single-bit processors in a Thinking Machines CM-2 would execute the same instruction at the same time, allowing, for instance, to logically combine 65,536 pairs of bits at a time, using a hypercube-connected network or processor-dedicated RAM to find its operands. Supercomputing moved away from the SIMD approach when inexpensive scalar
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524:'s vector extension uses an alternative approach: instead of exposing the sub-register-level details to the programmer, the instruction set abstracts them out as a few "vector registers" that use the same interfaces across all CPUs with this instruction set. The hardware handles all alignment issues and "strip-mining" of loops. Machines with different vector sizes would be able to run the same code. LLVM calls this vector type "vscale".
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to be distinguished from older ones, the newer architectures are then considered "short-vector" architectures, as earlier SIMD and vector supercomputers had vector lengths from 64 to 64,000. A modern supercomputer is almost always a cluster of MIMD computers, each of which implements (short-vector) SIMD instructions.
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with embedded SIMD have largely taken over this task from the CPU. Some systems also include permute functions that re-pack elements inside vectors, making them particularly useful for data processing and compression. They are also used in cryptography. The trend of general-purpose computing on GPUs
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to target maximal cache optimality, though this technique will require more intermediate state. Note: Batch-pipeline systems (example: GPUs or software rasterization pipelines) are most advantageous for cache control when implemented with SIMD intrinsics, but they are not exclusive to SIMD features.
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Different architectures provide different register sizes (e.g. 64, 128, 256 and 512 bits) and instruction sets, meaning that programmers must provide multiple implementations of vectorized code to operate optimally on any given CPU. In addition, the possible set of SIMD instructions grows with each
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All of these developments have been oriented toward support for real-time graphics, and are therefore oriented toward processing in two, three, or four dimensions, usually with vector lengths of between two and sixteen words, depending on data type and architecture. When new SIMD architectures need
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of an image consists of three values for the brightness of the red (R), green (G) and blue (B) portions of the color. To change the brightness, the R, G and B values are read from memory, a value is added to (or subtracted from) them, and the resulting values are written back out to memory. Audio
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Consumer software is typically expected to work on a range of CPUs covering multiple generations, which could limit the programmer's ability to use new SIMD instructions to improve the computational performance of a program. The solution is to include multiple versions of the same code that uses
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With a SIMD processor there are two improvements to this process. For one the data is understood to be in blocks, and a number of values can be loaded all at once. Instead of a series of instructions saying "retrieve this pixel, now retrieve the next pixel", a SIMD processor will have a single
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Emscripten, Mozilla's C/C++-to-JavaScript compiler, with extensions can enable compilation of C++ programs that make use of SIMD intrinsics or GCC-style vector code to the SIMD API of JavaScript, resulting in equivalent speedups compared to scalar code. It also supports (and now prefers) the
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The current era of SIMD processors grew out of the desktop-computer market rather than the supercomputer market. As desktop processors became powerful enough to support real-time gaming and audio/video processing during the 1990s, demand grew for this particular type of computing power, and
1018:, is a range of techniques and tricks used for performing SIMD in general-purpose registers on hardware that does not provide any direct support for SIMD instructions. This can be used to exploit parallelism in certain algorithms even on hardware that does not support SIMD directly.
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confused matters somewhat, but today the system seems to have settled down (after AMD adopted SSE) and newer compilers should result in more SIMD-enabled software. Intel and AMD now both provide optimized math libraries that use SIMD instructions, and open source alternatives like
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Instances of these types are immutable and in optimized code are mapped directly to SIMD registers. Operations expressed in Dart typically are compiled into a single instruction without any overhead. This is similar to C and C++ intrinsics. Benchmarks for
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Instead of providing an SIMD datatype, compilers can also be hinted to auto-vectorize some loops, potentially taking some assertions about the lack of data dependency. This is not as flexible as manipulating SIMD variables directly, but is easier to use.
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instruction that effectively says "retrieve n pixels" (where n is a number that varies from design to design). For a variety of reasons, this can take much less time than retrieving each pixel individually, as with a traditional CPU design.
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software was at first slow, due to a number of problems. One was that many of the early SIMD instruction sets tended to slow overall performance of the system due to the re-use of existing floating point registers. Other systems, like
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and controlled by a general purpose CPU) and is geared towards the huge datasets required by 3D and video processing applications. It differs from traditional ISAs by being SIMD from the ground up with no separate scalar registers.
222:: there are simultaneous (parallel) computations, but each unit performs the exact same instruction at any given moment (just with different data). SIMD is particularly applicable to common tasks such as adjusting the contrast in a
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executing its own instruction stream, or as a coprocessor driven by ordinary CPU instructions. 3D graphics applications tend to lend themselves well to SIMD processing as they rely heavily on operations with 4-dimensional vectors.
1034:) guaranteeing the generation of vector code. Intel, AltiVec, and ARM NEON provide extensions widely adopted by the compilers targeting their CPUs. (More complex operations are the task of vector math libraries.)
868:
The SIMD tripling of four 8-bit numbers. The CPU loads 4 numbers at once, multiplies them all in one SIMD-multiplication, and saves them all at once back to RAM. In theory, the speed can be multiplied by
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Instruction sets are architecture-specific: some processors lack SIMD instructions entirely, so programmers must provide non-vectorized implementations (or different vectorized implementations) for them.
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The ordinary tripling of four 8-bit numbers. The CPU loads one 8-bit number into R1, multiplies it with R2, and then saves the answer from R3 back to RAM. This process is repeated for each number.
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As using FMV requires code modification on GCC and Clang, vendors more commonly use library multi-versioning: this is easier to achieve as only compiler switches need to be changed.
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Another advantage is that the instruction operates on all loaded data in a single operation. In other words, if the SIMD system works by loading up eight data points at once, the
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that works similarly to the GCC extension. LLVM's libcxx seems to implement it. For GCC and libstdc++, a wrapper library that builds on top of the GCC extension is available.
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An application that may take advantage of SIMD is one where the same value is being added to (or subtracted from) a large number of data points, a common operation in many
440:; the eight values are processed in parallel even on a non-superscalar processor, and a superscalar processor may be able to perform multiple SIMD operations in parallel.
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Small-scale (64 or 128 bits) SIMD became popular on general-purpose CPUs in the early 1990s and continued through 1997 and later with Motion Video
Instructions (MVI) for
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takes the extensions a step further by abstracting them into a universal interface that can be used on any platform by providing a way of defining SIMD datatypes. The
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972:, therefore assembly language programming is rarely needed. Additionally, many of the systems that would benefit from SIMD were supplied by Apple itself, for example
1352:'s CSX600 (2004) has 96 cores each with two double-precision floating point units while the CSX700 (2008) has 192. Stream Processors is headed by computer architect
486:; programmers familiar with one particular architecture may not expect this. Worse: the alignment may change from one revision or "compatible" processor to another.
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also supports FMV. The setup is similar to GCC and Clang in that the code defines what instruction sets to compile for, but cloning is manually done via inlining.
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Currently, implementing an algorithm with SIMD instructions usually requires human labor; most compilers do not generate SIMD instructions from a typical
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operation being applied to the data will happen to all eight values at the same time. This parallelism is separate from the parallelism provided by a
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An order of magnitude increase in code size is not uncommon, when compared to equivalent scalar or equivalent vector code, and an order of magnitude
1227:. As of August 2020, the WebAssembly interface remains unfinished, but its portable 128-bit SIMD feature has already seen some use in many engines.
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since clang 7 allow for a simplified approach, with the compiler taking care of function duplication and selection. GCC and clang requires explicit
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instruction set shared a register file with the floating-point stack, which caused inefficiencies when mixing floating-point and MMX code. However,
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in the program or a library is duplicated and compiled for many instruction set extensions, and the program decides which one to use at run-time.
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FMV, manually coded in assembly language, is quite commonly used in a number of performance-critical libraries such as glibc and libjpeg-turbo.
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Further complexity may be apparent to avoid dependence within series such as code strings; while independence is required for vectorization.
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system. Since then, there have been several extensions to the SIMD instruction sets for both architectures. Advanced vector extensions AVX,
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now chooses at runtime processor-specific implementations of its own math operations, including the use of SIMD-capable instructions.
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is duplicated for many instruction set extensions, and the operating system or the program decides which one to load at run-time.
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Conte, G.; Tommesani, S.; Zanichelli, F. (2000). "The long and winding road to high-performance image processing with MMX/SSE".
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programming language, bringing the benefits of SIMD to web programs for the first time. The interface consists of two types:
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package, available on NuGet, implements SIMD datatypes. Java also has a new proposed API for SIMD instructions available in
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Gathering data into SIMD registers and scattering it to the correct destination locations is tricky (sometimes requiring
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Larger scale commercial SIMD processors are available from ClearSpeed
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In 2013 John McCutchan announced that he had created a high-performance interface to SIMD instruction sets for the
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1.1 desktops in 1994 to accelerate MPEG decoding. Sun
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Specific instructions like rotations or three-operand addition are not available in some SIMD instruction sets.
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Article about
Optimizing the Rendering Pipeline of Animated Models Using the Intel Streaming SIMD Extensions
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Ziilabs produced an SIMD type processor for use on mobile devices, such as media players and mobile phones.
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It is common for publishers of the SIMD instruction sets to make their own C/C++ language extensions with
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in the 1970s and 1980s. Vector processing architectures are now considered separate from SIMD computers:
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It has generally proven difficult to find sustainable commercial applications for SIMD-only processors.
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labels in the code to "clone" functions, while ICC does so automatically (under the command-line option
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17 in an incubator module. It also has a safe fallback mechanism on unsupported CPUs to simple loops.
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may not easily benefit from SIMD; however, it is theoretically possible to vectorize comparisons and
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new register size. Unfortunately, for legacy support reasons, the older versions cannot be retired.
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Clang compiler also implements the feature, with an analogous interface defined in the IR. Rust's
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either older or newer SIMD technologies, and pick one that best fits the user's CPU at run-time (
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but is still far better than non-predicated SIMD. Detailed comparative examples are given in the
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and Intel announced at IDF 2013 that they are implementing McCutchan's specification for both
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Not all algorithms can be vectorized easily. For example, a flow-control-heavy task like code
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Programming with particular SIMD instruction sets can involve numerous low-level challenges.
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offered a rich system and can be programmed using increasingly sophisticated compilers from
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Lee, R.B. (1995). "Realtime MPEG video via software decompression on a PA-RISC processor".
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would likewise, for volume control, multiply both Left and Right channels simultaneously.
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hint. This OpenMP interface has replaced a wide set of nonstandard extensions, including
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had somewhat more success, even though they entered the SIMD market later than the rest.
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supports LMV and this functionality is adopted by the Intel-backed Clear Linux project.
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Please help update this article to reflect recent events or newly available information.
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microprocessor vendors turned to SIMD to meet the demand. Hewlett-Packard introduced
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841:. The Xetal has 320 16-bit processor elements especially designed for vision tasks.
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Introduction to
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as well as AltiVec. Apple was the dominant purchaser of PowerPC chips from IBM and
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was unusual in that one of its vector-float units could function as an autonomous
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Proc. Fifth IEEE Int'l
Workshop on Computer Architectures for Machine Perception
207:(ISA), but it should not be confused with an ISA. SIMD describes computers with
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Jensen, Peter; Jibaja, Ivan; Hu, Ningxin; Gohman, Dan; McCutchan, John (2015).
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applications like conversion between various video standards and frame rates (
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visualization show near 400% speedup compared to scalar code written in Dart.
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Large register files which increases power consumption and required chip area.
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architecture in 1996. This sparked the introduction of the much more powerful
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applications. One example would be changing the brightness of an image. Each
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digest of papers
Compcon '95. Technologies for the Information Superhighway
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980:. However, in 2006, Apple computers moved to Intel x86 processors. Apple's
802:
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1254:. The GAPP's recent incarnations have become a powerful tool in real-time
906:. Compilers also often lacked support, requiring programmers to resort to
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SIMD instructions are widely used to process 3D graphics, although modern
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effectiveness (work done per instruction) is achievable with Vector ISAs.
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that perform the same operation on multiple data points simultaneously.
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1879:"Transparent use of library packages optimized for Intel® architecture"
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in compilers is an active area of computer science research. (Compare
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has incorporated a SIMD processor somewhere in its architecture. The
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2061:"Yeppp!": cross-platform, open-source SIMD library from Georgia Tech
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1567:"AMD Zen 4 AVX-512 Performance Analysis On The Ryzen 9 7950X Review"
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McCutchan's work on Dart, now called SIMD.js, has been adopted by
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designs include SIMD instructions to improve the performance of
30:"SIMD" redirects here. For the cryptographic hash function, see
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systems. Intel responded in 1999 by introducing the all-new
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The first era of modern SIMD computers was characterized by
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as "Associative
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does not, due to Flynn's work (1966, 1972) pre-dating the
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1947:"tc39/ecmascript_simd: SIMD numeric type for EcmaScript"
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Patterson, David; Waterman, Andrew (18 September 2017).
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The first widely deployed desktop SIMD was with Intel's
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microprocessor. MIPS followed suit with their similar
1435:"Some Computer Organizations and Their Effectiveness"
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A later processor that used vector processing is the
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and taken to the commercial sector by their spin-off
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approaches based on commodity processors such as the
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Short Vector
Extensions in Commercial Microprocessor
1971:
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Float32x4, 4 single precision floating point values.
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SIMD instructions process 512 bits of data at once.
1735:"RyuJIT: The next-generation JIT compiler for .NET"
1285:A more ubiquitous application for SIMD is found in
1321:used in the Playstation 3, which was developed by
330:became more powerful, and interest in SIMD waned.
1589:
59:may be compromised due to out-of-date information
4801:
1623:, showing a stream cipher implemented using SSE2
1242:One that has had some measure of success is the
882:) may lead to wider use of SIMD in the future.
563:Examples of SIMD supercomputers (not including
238:use. SIMD has three different subcategories in
150:Associative processing (predicated/masked SIMD)
269:The first use of SIMD instructions was in the
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1633:Subject: up to 1.4x RSA throughput using SSE2
346:" instruction set extensions in 1995, in its
261:(GPUs) are often wide SIMD implementations.
3108:Computer performance by orders of magnitude
1974:"SIMD in JavaScript via C++ and Emscripten"
1130:Library multi-versioning (LMV): the entire
4053:
4039:
2117:
2110:
2096:
1902:
1234:
1119:). There are two main camps of solutions:
837:, developed several SIMD processors named
829:'s instruction set is heavily SIMD based.
392:are developed by Intel. AMD supports AVX,
1991:"Porting SIMD code targeting WebAssembly"
1423:
1333:. It uses a number of SIMD processors (a
546:SIMD. This approach is not as compact as
34:. For the Scottish statistical tool, see
1109:
863:
855:
179:
1675:Using the GNU Compiler Collection (GCC)
1021:
662:, models 1 and 2 (CM-1 and CM-2), from
615:Geometric-Arithmetic Parallel Processor
14:
4802:
4060:
2009:"ZiiLABS ZMS-05 ARM 9 Media Processor"
1592:"SIMD Instructions Considered Harmful"
917:had a slow start. The introduction of
821:. The IBM, Sony, Toshiba co-developed
36:Scottish index of multiple deprivation
4034:
2091:
1871:
1429:
3079:Floating-point operations per second
1843:"Function multi-versioning in GCC 6"
1479:
1406:Single Program, Multiple Data (SPMD)
1337:architecture, each with independent
246:. SIMT should not be confused with
40:
1905:"Bringing SIMD to the web via Dart"
1524:
1231:WebAssembly 128-bit SIMD proposal.
1123:Function multi-versioning (FMV): a
1053:) uses this interface, and so does
24:
2046:Cracking Open The Pentium 3 (1999)
1172:
1060:C++ has an experimental interface
744:Multimedia Acceleration eXtensions
145:Pipelined processing (packed SIMD)
25:
4841:
2034:
1823:
1188:Int32x4, 4 32-bit integer values.
946:have started to appear (see also
538:takes another approach, known in
189:Single instruction, multiple data
184:Single instruction, multiple data
4783:
4782:
4005:Semiconductor device fabrication
1008:designs from Freescale and IBM.
443:
45:
4254:Analysis of parallel algorithms
3980:History of general-purpose CPUs
2207:Nondeterministic Turing machine
2001:
1995:Emscripten 1.40.1 documentation
1983:
1965:
1939:
1921:
1896:
1853:
1835:
1817:
1787:
1769:
1755:
1741:
1727:
1713:
1688:
1663:
1638:
1621:Salsa20 speed; Salsa20 software
1155:
1151:
1103:
1099:
1091:
1075:
1061:
1050:
1046:
594:ICL Distributed Array Processor
280:of the early 1970s such as the
273:, which was completed in 1966.
2160:Deterministic finite automaton
1826:"OMP5.1: Loop Transformations"
1801:. 18 July 2012. Archived from
1626:
1614:
1602:
1583:
1559:
1518:
1462:
1443:IEEE Transactions on Computers
605:Burroughs Scientific Processor
482:SIMD may have restrictions on
13:
1:
4201:Simultaneous and heterogenous
2951:Simultaneous and heterogenous
1646:"SIMD library math functions"
1416:
1401:SIMD within a register (SWAR)
664:Thinking Machines Corporation
557:
407:
309:massively parallel processing
4789:Category: Parallel computing
3635:Integrated memory controller
3617:Translation lookaside buffer
2816:Memory dependence prediction
2259:Random-access stored program
2212:Probabilistic Turing machine
1391:Instruction set architecture
1049:crate (and the experimental
885:Adoption of SIMD systems in
642:Massively Parallel Processor
520:To remedy problems 1 and 5,
209:multiple processing elements
205:instruction set architecture
7:
3091:Synaptic updates per second
1953:. Ecma TC39. 22 August 2019
1696:"Clang Language Extensions"
1359:
1030:or special datatypes (with
992:) were modified to support
851:
710:
650:Goddard Space Flight Center
400:in their current products.
226:or adjusting the volume of
27:Type of parallel processing
10:
4846:
4096:High-performance computing
3495:Heterogeneous architecture
2417:Orthogonal instruction set
2187:Alternating Turing machine
2175:Quantum cellular automaton
1535:10.1109/CMPCON.1995.512384
1382:Advanced Vector Extensions
264:
29:
4815:Digital signal processing
4778:
4730:Automatic parallelization
4722:
4584:
4424:
4374:
4366:Application checkpointing
4328:
4292:
4236:
4180:
4129:
4068:
3985:Microprocessor chronology
3972:
3948:Dynamic frequency scaling
3921:
3857:
3795:
3749:
3701:
3656:
3576:
3503:
3472:
3377:
3298:
3262:
3216:
3116:
3103:Cache performance metrics
3042:
2976:
2926:
2837:
2828:
2801:
2756:
2723:
2695:
2686:
2506:
2409:
2398:
2269:
2125:
2041:SIMD architectures (2000)
1723:. VcDevel. 6 August 2020.
1366:Streaming SIMD Extensions
1282:, and image enhancement.
1246:, which was developed by
1160:Rust programming language
536:Scalable Vector Extension
493:) and can be inefficient.
259:graphics processing units
4000:Hardware security module
3343:Digital signal processor
3320:Graphics processing unit
3132:Graphics processing unit
1496:10.1109/CAMP.2000.875989
1202:3D vertex transformation
785:'s ARC Video subsystem,
4745:Embarrassingly parallel
4740:Deterministic algorithm
3953:Dynamic voltage scaling
3736:Memory address register
3630:Branch target predictor
3594:Address generation unit
3337:Physics processing unit
3126:Central processing unit
3085:Transactions per second
3073:Instructions per second
2996:Array processing (SIMT)
2140:Stored-program computer
1456:10.1109/TC.1972.5009071
1235:Commercial applications
1144:GNU Compiler Collection
1062:std::experimental::simd
1002:Freescale Semiconductor
470:Automatic vectorization
468:program, for instance.
276:SIMD was the basis for
140:Array processing (SIMT)
4460:Associative processing
4416:Non-blocking algorithm
4222:Clustered multi-thread
3759:Hardwired control unit
3641:Memory management unit
3606:Memory management unit
3355:Secure cryptoprocessor
3349:Tensor Processing Unit
3331:Vision processing unit
3065:Cycles per instruction
3059:Instructions per cycle
3006:Associative processing
2697:Instruction pipelining
2119:Processor technologies
1795:"Tutorial pragma simd"
1700:Clang 11 documentation
1289:: nearly every modern
1076:System.Numerics.Vector
1012:SIMD within a register
870:
861:
296:includes them whereas
216:data level parallelism
214:Such machines exploit
185:
4576:Hardware acceleration
4489:Superscalar processor
4479:Dataflow architecture
4076:Distributed computing
3842:Sum-addressed decoder
3588:Arithmetic logic unit
2715:Classic RISC pipeline
2669:Epiphany architecture
2516:Motorola 68000 series
1861:"2045-target-feature"
1763:"JEP 338: Vector API"
1276:image noise reduction
1198:matrix multiplication
1110:SIMD multi-versioning
867:
859:
544:"Predicated" (masked)
438:superscalar processor
286:Texas Instruments ASC
278:vector supercomputers
240:Flynn's 1972 Taxonomy
183:
111:Multiple data streams
4810:Classes of computers
4455:Pipelined processing
4404:Explicit parallelism
4399:Implicit parallelism
4389:Dataflow programming
3963:Performance per watt
3541:replacement policies
3207:Package on a package
3097:Performance per watt
3001:Pipelined processing
2771:Tomasulo's algorithm
2576:Clipper architecture
2432:Application-specific
2145:Finite-state machine
1929:"SIMD in JavaScript"
1883:Clear Linux* Project
1737:. 30 September 2013.
1529:. pp. 186–192.
1470:"MIMD1 - XP/S, CM-5"
1325:in cooperation with
1032:operator overloading
1022:Programmer interface
32:SIMD (hash function)
4679:Parallel Extensions
4484:Pipelined processor
3995:Digital electronics
3648:Instruction decoder
3600:Floating-point unit
3254:Soft microprocessor
3201:System in a package
2776:Reservation station
2306:Transport-triggered
1671:"Vector Extensions"
1132:programming library
1028:intrinsic functions
568:
197:parallel processing
4825:Parallel computing
4553:Massively parallel
4531:distributed shared
4351:Cache invalidation
4315:Instruction window
4106:Manycore processor
4086:Massively parallel
4081:Parallel computing
4062:Parallel computing
3867:Integrated circuit
3711:Processor register
3365:Baseband processor
2710:Operand forwarding
2170:Cellular automaton
2071:2013-06-10 at the
1805:on 4 December 2020
1721:"VcDevel/std-simd"
1433:(September 1972).
1291:video game console
1140:Intel C++ Compiler
871:
862:
660:Connection Machine
562:
491:permute operations
361:extensions to the
338:instructions into
242:, one of which is
186:
132:SIMD subcategories
90:Single data stream
4797:
4796:
4750:Parallel slowdown
4384:Stream processing
4274:Karp–Flatt metric
4028:
4027:
3917:
3916:
3536:Instruction cache
3526:Scratchpad memory
3373:
3372:
3360:Network processor
3289:Network on a chip
3244:Ultra-low-voltage
3195:Multi-chip module
3038:
3037:
2824:
2823:
2811:Branch prediction
2788:Register renaming
2682:
2681:
2664:VISC architecture
2486:Quantum computing
2481:VISC architecture
2363:Secondary storage
2279:Microarchitecture
2239:Register machines
1865:The Rust RFC Book
1777:"SIMD Directives"
1431:Flynn, Michael J.
1280:video compression
1146:since GCC 6, and
1106:, and many more.
1104:#pragma GCC ivdep
986:development tools
908:assembly language
887:personal computer
708:
707:
565:vector processors
552:Vector processing
548:Vector processing
474:vector processing
317:Thinking Machines
294:Duncan's Taxonomy
178:
177:
78:
77:
16:(Redirected from
4837:
4820:Flynn's taxonomy
4786:
4785:
4760:Software lockout
4559:Computer cluster
4494:Vector processor
4449:Array processing
4434:Flynn's taxonomy
4341:Memory coherence
4116:Computer network
4055:
4048:
4041:
4032:
4031:
3990:Processor design
3882:Power management
3764:Instruction unit
3625:Branch predictor
3574:
3573:
3272:System on a chip
3214:
3213:
3054:Transistor count
2978:Flynn's taxonomy
2835:
2834:
2693:
2692:
2496:Addressing modes
2407:
2406:
2353:Memory hierarchy
2217:Hypercomputation
2135:Abstract machine
2112:
2105:
2098:
2089:
2088:
2028:
2027:
2025:
2024:
2015:. Archived from
2005:
1999:
1998:
1987:
1981:
1980:
1978:
1969:
1963:
1962:
1960:
1958:
1943:
1937:
1936:
1925:
1919:
1918:
1916:
1910:. Archived from
1909:
1903:John McCutchan.
1900:
1894:
1893:
1891:
1889:
1875:
1869:
1868:
1857:
1851:
1850:
1839:
1833:
1832:
1830:
1824:Kruse, Michael.
1821:
1815:
1814:
1812:
1810:
1791:
1785:
1784:
1773:
1767:
1766:
1759:
1753:
1752:
1745:
1739:
1738:
1731:
1725:
1724:
1717:
1711:
1710:
1708:
1706:
1692:
1686:
1685:
1683:
1681:
1667:
1661:
1660:
1658:
1656:
1642:
1636:
1630:
1624:
1618:
1612:
1606:
1600:
1599:
1587:
1581:
1580:
1578:
1577:
1571:www.phoronix.com
1563:
1557:
1556:
1522:
1516:
1515:
1483:
1477:
1476:
1474:
1466:
1460:
1459:
1439:
1427:
1396:Flynn's taxonomy
1270:formats, etc.),
1256:video processing
1157:
1153:
1117:dynamic dispatch
1105:
1101:
1093:
1092:#pragma omp simd
1077:
1063:
1052:
1048:
569:
561:
540:Flynn's Taxonomy
435:
298:Flynn's Taxonomy
252:hardware threads
248:software threads
201:Flynn's taxonomy
84:Flynn's taxonomy
80:
79:
73:
70:
64:
57:factual accuracy
49:
48:
41:
21:
4845:
4844:
4840:
4839:
4838:
4836:
4835:
4834:
4800:
4799:
4798:
4793:
4774:
4718:
4624:Coarray Fortran
4580:
4564:Beowulf cluster
4420:
4370:
4361:Synchronization
4346:Cache coherence
4336:Multiprocessing
4324:
4288:
4269:Cost efficiency
4264:Gustafson's law
4232:
4176:
4125:
4101:Multiprocessing
4091:Cloud computing
4064:
4059:
4029:
4024:
4010:Tick–tock model
3968:
3924:
3913:
3853:
3837:Address decoder
3791:
3745:
3741:Program counter
3716:Status register
3697:
3652:
3612:Load–store unit
3579:
3572:
3499:
3468:
3369:
3326:Image processor
3301:
3294:
3264:
3258:
3234:Microcontroller
3224:Embedded system
3212:
3112:
3045:
3034:
2972:
2922:
2820:
2797:
2781:Re-order buffer
2752:
2733:Data dependency
2719:
2678:
2508:
2502:
2401:
2400:Instruction set
2394:
2380:Multiprocessing
2348:Cache hierarchy
2341:Register/memory
2265:
2165:Queue automaton
2121:
2116:
2073:Wayback Machine
2037:
2032:
2031:
2022:
2020:
2007:
2006:
2002:
1989:
1988:
1984:
1976:
1970:
1966:
1956:
1954:
1945:
1944:
1940:
1927:
1926:
1922:
1914:
1907:
1901:
1897:
1887:
1885:
1877:
1876:
1872:
1859:
1858:
1854:
1841:
1840:
1836:
1828:
1822:
1818:
1808:
1806:
1793:
1792:
1788:
1775:
1774:
1770:
1761:
1760:
1756:
1751:. 7 April 2014.
1747:
1746:
1742:
1733:
1732:
1728:
1719:
1718:
1714:
1704:
1702:
1694:
1693:
1689:
1679:
1677:
1669:
1668:
1664:
1654:
1652:
1644:
1643:
1639:
1631:
1627:
1619:
1615:
1607:
1603:
1588:
1584:
1575:
1573:
1565:
1564:
1560:
1545:
1523:
1519:
1484:
1480:
1472:
1468:
1467:
1463:
1437:
1428:
1424:
1419:
1362:
1266:, NTSC to/from
1248:Lockheed Martin
1237:
1175:
1173:SIMD on the web
1112:
1074:in RyuJIT. The
1024:
854:
713:
623:Lockheed Martin
619:Martin Marietta
560:
446:
433:
410:
267:
195:) is a type of
74:
68:
65:
62:
54:This article's
50:
46:
39:
28:
23:
22:
15:
12:
11:
5:
4843:
4833:
4832:
4830:SIMD computing
4827:
4822:
4817:
4812:
4795:
4794:
4792:
4791:
4779:
4776:
4775:
4773:
4772:
4767:
4762:
4757:
4755:Race condition
4752:
4747:
4742:
4737:
4732:
4726:
4724:
4720:
4719:
4717:
4716:
4711:
4706:
4701:
4696:
4691:
4686:
4681:
4676:
4671:
4666:
4661:
4656:
4651:
4646:
4641:
4636:
4631:
4626:
4621:
4616:
4611:
4606:
4601:
4596:
4590:
4588:
4582:
4581:
4579:
4578:
4573:
4568:
4567:
4566:
4556:
4550:
4549:
4548:
4543:
4538:
4533:
4528:
4523:
4513:
4512:
4511:
4506:
4499:Multiprocessor
4496:
4491:
4486:
4481:
4476:
4475:
4474:
4469:
4464:
4463:
4462:
4457:
4452:
4441:
4430:
4428:
4422:
4421:
4419:
4418:
4413:
4412:
4411:
4406:
4401:
4391:
4386:
4380:
4378:
4372:
4371:
4369:
4368:
4363:
4358:
4353:
4348:
4343:
4338:
4332:
4330:
4326:
4325:
4323:
4322:
4317:
4312:
4307:
4302:
4296:
4294:
4290:
4289:
4287:
4286:
4281:
4276:
4271:
4266:
4261:
4256:
4251:
4246:
4240:
4238:
4234:
4233:
4231:
4230:
4228:Hardware scout
4225:
4219:
4214:
4209:
4203:
4198:
4192:
4186:
4184:
4182:Multithreading
4178:
4177:
4175:
4174:
4169:
4164:
4159:
4154:
4149:
4144:
4139:
4133:
4131:
4127:
4126:
4124:
4123:
4121:Systolic array
4118:
4113:
4108:
4103:
4098:
4093:
4088:
4083:
4078:
4072:
4070:
4066:
4065:
4058:
4057:
4050:
4043:
4035:
4026:
4025:
4023:
4022:
4017:
4015:Pin grid array
4012:
4007:
4002:
3997:
3992:
3987:
3982:
3976:
3974:
3970:
3969:
3967:
3966:
3960:
3955:
3950:
3945:
3940:
3935:
3929:
3927:
3919:
3918:
3915:
3914:
3912:
3911:
3906:
3901:
3896:
3891:
3886:
3885:
3884:
3879:
3874:
3863:
3861:
3855:
3854:
3852:
3851:
3849:Barrel shifter
3846:
3845:
3844:
3839:
3832:Binary decoder
3829:
3828:
3827:
3817:
3812:
3807:
3801:
3799:
3793:
3792:
3790:
3789:
3784:
3776:
3771:
3766:
3761:
3755:
3753:
3747:
3746:
3744:
3743:
3738:
3733:
3728:
3723:
3721:Stack register
3718:
3713:
3707:
3705:
3699:
3698:
3696:
3695:
3694:
3693:
3688:
3678:
3673:
3668:
3662:
3660:
3654:
3653:
3651:
3650:
3645:
3644:
3643:
3632:
3627:
3622:
3621:
3620:
3614:
3603:
3597:
3591:
3584:
3582:
3571:
3570:
3565:
3560:
3555:
3550:
3549:
3548:
3543:
3538:
3533:
3528:
3523:
3513:
3507:
3505:
3501:
3500:
3498:
3497:
3492:
3487:
3482:
3476:
3474:
3470:
3469:
3467:
3466:
3465:
3464:
3454:
3449:
3444:
3439:
3434:
3429:
3424:
3419:
3414:
3409:
3404:
3399:
3394:
3389:
3383:
3381:
3375:
3374:
3371:
3370:
3368:
3367:
3362:
3357:
3352:
3346:
3340:
3334:
3328:
3323:
3317:
3315:AI accelerator
3312:
3306:
3304:
3296:
3295:
3293:
3292:
3286:
3281:
3278:Multiprocessor
3275:
3268:
3266:
3260:
3259:
3257:
3256:
3251:
3246:
3241:
3236:
3231:
3229:Microprocessor
3226:
3220:
3218:
3217:By application
3211:
3210:
3204:
3198:
3192:
3187:
3182:
3177:
3172:
3167:
3162:
3160:Tile processor
3157:
3152:
3147:
3142:
3141:
3140:
3129:
3122:
3120:
3114:
3113:
3111:
3110:
3105:
3100:
3094:
3088:
3082:
3076:
3070:
3069:
3068:
3056:
3050:
3048:
3040:
3039:
3036:
3035:
3033:
3032:
3031:
3030:
3020:
3015:
3014:
3013:
3008:
3003:
2998:
2988:
2982:
2980:
2974:
2973:
2971:
2970:
2965:
2960:
2955:
2954:
2953:
2948:
2946:Hyperthreading
2938:
2932:
2930:
2928:Multithreading
2924:
2923:
2921:
2920:
2915:
2910:
2909:
2908:
2898:
2897:
2896:
2891:
2881:
2880:
2879:
2874:
2864:
2859:
2858:
2857:
2852:
2841:
2839:
2832:
2826:
2825:
2822:
2821:
2819:
2818:
2813:
2807:
2805:
2799:
2798:
2796:
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2712:
2707:
2705:Pipeline stall
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2654:z/Architecture
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2396:
2395:
2393:
2392:
2387:
2382:
2377:
2372:
2367:
2366:
2365:
2360:
2358:Virtual memory
2350:
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2333:
2328:
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2313:
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2298:
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2219:
2214:
2209:
2204:
2199:
2194:
2189:
2182:Turing machine
2179:
2178:
2177:
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2157:
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2137:
2131:
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2100:
2092:
2086:
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2075:
2063:
2058:
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2036:
2035:External links
2033:
2030:
2029:
2000:
1982:
1964:
1938:
1920:
1917:on 2013-12-03.
1895:
1870:
1852:
1834:
1816:
1786:
1781:www.openmp.org
1768:
1754:
1740:
1726:
1712:
1687:
1662:
1650:Stack Overflow
1637:
1625:
1613:
1609:RE: SSE2 speed
1601:
1582:
1558:
1543:
1517:
1478:
1461:
1450:(9): 948–960.
1421:
1420:
1418:
1415:
1414:
1413:
1408:
1403:
1398:
1393:
1388:
1361:
1358:
1319:Cell Processor
1236:
1233:
1206:Mandelbrot set
1190:
1189:
1186:
1174:
1171:
1136:
1135:
1128:
1111:
1108:
1070:added SIMD to
1039:GNU C Compiler
1023:
1020:
954:Apple Computer
875:graphics cards
853:
850:
823:Cell Processor
752:MMX and iwMMXt
712:
709:
706:
705:
696:
692:
691:
682:
678:
677:
676:MP-1 and MP-2
671:
667:
666:
657:
653:
652:
639:
635:
634:
621:(continued at
612:
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559:
556:
518:
517:
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515:
514:corrects this.
504:
500:
497:
494:
487:
484:data alignment
477:
462:
459:
445:
442:
409:
406:
369:system in the
313:supercomputers
266:
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230:. Most modern
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4644:Global Arrays
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3808:
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3731:Memory buffer
3729:
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3726:Register file
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3666:Combinational
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2779:
2777:
2774:
2773:
2772:
2769:
2767:
2766:Scoreboarding
2764:
2763:
2761:
2759:
2755:
2749:
2748:False sharing
2746:
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2741:
2739:
2736:
2734:
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2730:
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2722:
2716:
2713:
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2544:
2542:
2541:Stanford MIPS
2539:
2537:
2534:
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2529:
2527:
2524:
2522:
2519:
2517:
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2513:
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2423:
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2408:
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2403:
2402:architectures
2397:
2391:
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2383:
2381:
2378:
2376:
2373:
2371:
2370:Heterogeneous
2368:
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2349:
2346:
2342:
2339:
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2321:Memory access
2319:
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2272:
2268:
2260:
2257:
2255:
2254:Random-access
2252:
2250:
2247:
2245:
2242:
2241:
2240:
2237:
2235:
2234:Stack machine
2232:
2230:
2227:
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2220:
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2208:
2205:
2203:
2200:
2198:
2195:
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2185:
2184:
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2180:
2176:
2173:
2171:
2168:
2166:
2163:
2161:
2158:
2156:
2153:
2151:
2150:with datapath
2148:
2147:
2146:
2143:
2141:
2138:
2136:
2133:
2132:
2130:
2128:
2124:
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2064:
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2057:
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2049:
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2039:
2038:
2019:on 2011-07-18
2018:
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2010:
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1935:. 8 May 2014.
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1544:0-8186-7029-0
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1504:11381/2297671
1501:
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1299:PlayStation 2
1296:
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1272:deinterlacing
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824:
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817:(MaDMaX) and
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631:Silicon Optix
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444:Disadvantages
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328:Intel i860 XP
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321:
320:CM-1 and CM-2
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72:
60:
58:
52:
43:
42:
37:
33:
19:
4443:
4329:Coordination
4259:Amdahl's law
4195:Simultaneous
4020:Chip carrier
3958:Clock gating
3877:Mixed-signal
3774:Write buffer
3751:Control unit
3563:Clock signal
3302:accelerators
3284:Cypress PSoC
2990:
2941:Simultaneous
2758:Out-of-order
2390:Neuromorphic
2271:Architecture
2229:Belt machine
2222:Zeno machine
2155:Hierarchical
2021:. Retrieved
2017:the original
2012:
2003:
1994:
1985:
1967:
1955:. Retrieved
1950:
1941:
1932:
1923:
1912:the original
1898:
1886:. Retrieved
1882:
1873:
1864:
1855:
1846:
1837:
1819:
1807:. Retrieved
1803:the original
1798:
1789:
1780:
1771:
1757:
1743:
1729:
1715:
1703:. Retrieved
1699:
1690:
1678:. Retrieved
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1665:
1653:. Retrieved
1649:
1640:
1628:
1616:
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1595:
1585:
1574:. Retrieved
1570:
1561:
1526:
1520:
1487:
1481:
1464:
1447:
1441:
1425:
1347:
1344:
1316:
1312:Direct3D 9.0
1284:
1241:
1238:
1229:
1221:SpiderMonkey
1210:
1191:
1176:
1164:
1137:
1113:
1100:#pragma simd
1084:
1066:
1059:
1036:
1025:
1011:
1010:
952:
912:
884:
872:
843:
809:technology,
714:
703:Pyxsys, Inc.
644:(MPP), from
533:
528:
526:
519:
455:"batch flow"
454:
431:
427:
411:
402:
356:
348:UltraSPARC I
332:
315:such as the
306:
282:CDC Star-100
275:
268:
256:
213:
192:
188:
187:
118:
66:
55:
4765:Scalability
4526:distributed
4409:Concurrency
4376:Programming
4217:Cooperative
4206:Speculative
4142:Instruction
3805:Multiplexer
3769:Data buffer
3480:Single-core
3452:bit slicing
3310:Coprocessor
3165:Coprocessor
3046:performance
2968:Cooperative
2958:Speculative
2918:Distributed
2877:Superscalar
2862:Instruction
2830:Parallelism
2803:Speculative
2635:System/3x0
2507:Instruction
2284:Von Neumann
2197:Post–Turing
1957:8 September
1888:8 September
1339:local store
1287:video games
1278:, adaptive
1225:WebAssembly
1090:4.0+ has a
1047:packed_simd
220:concurrency
4804:Categories
4770:Starvation
4509:asymmetric
4244:PRAM model
4212:Preemptive
3925:management
3820:Multiplier
3681:Logic gate
3671:Sequential
3578:Functional
3558:Clock rate
3531:Data cache
3504:Components
3485:Multi-core
3473:Core count
2963:Preemptive
2867:Pipelining
2850:Bit-serial
2793:Wide-issue
2738:Structural
2660:Tilera ISA
2626:MicroBlaze
2596:ETRAX CRIS
2491:Comparison
2336:Load–store
2316:Endianness
2023:2010-05-24
1705:16 January
1680:16 January
1655:16 January
1576:2023-07-13
1417:References
1354:Bill Dally
1350:ClearSpeed
1213:ECMAScript
1125:subroutine
793:and VIS2,
689:Wavetracer
625:, then at
558:Chronology
529:or greater
506:The early
414:multimedia
408:Advantages
376:and IBM's
236:multimedia
218:, but not
69:March 2017
4504:symmetric
4249:PEM model
3859:Circuitry
3779:Microcode
3703:Registers
3546:coherence
3521:CPU cache
3379:Word size
3044:Processor
2688:Execution
2591:DEC Alpha
2569:Power ISA
2385:Cognitive
2192:Universal
1308:Microsoft
1068:Microsoft
1051:std::sims
1006:Power ISA
978:QuickTime
904:registers
685:Zephyr DC
670:1987-1996
638:1983-1991
584:ILLIAC IV
271:ILLIAC IV
4735:Deadlock
4723:Problems
4689:pthreads
4669:OpenHMPP
4594:Ateji PX
4555:computer
4426:Hardware
4293:Elements
4279:Slowdown
4190:Temporal
4172:Pipeline
3797:Datapath
3490:Manycore
3462:variable
3300:Hardware
2936:Temporal
2616:OpenRISC
2311:Cellular
2301:Dataflow
2294:modified
2069:Archived
1809:9 August
1799:CilkPlus
1512:13180531
1360:See also
1262:to/from
1102:, GCC's
962:Motorola
913:SIMD on
910:coding.
902:and MMX
852:Software
844:Intel's
711:Hardware
575:Example
371:Motorola
354:system.
304:(1977).
284:and the
158:See also
4694:RaftLib
4674:OpenACC
4649:GPUOpen
4639:C++ AMP
4614:Charm++
4356:Barrier
4300:Process
4284:Speedup
4069:General
3973:Related
3904:Quantum
3894:Digital
3889:Boolean
3787:Counter
3686:Quantum
3447:512-bit
3442:256-bit
3437:128-bit
3280:(MPSoC)
3265:on chip
3263:Systems
3081:(FLOPS)
2894:Process
2743:Control
2725:Hazards
2611:Itanium
2606:Unicore
2564:PowerPC
2289:Harvard
2249:Pointer
2244:Counter
2202:Quantum
2013:ZiiLabs
1847:lwn.net
1596:SIGARCH
1553:2262046
1386:AVX-512
1327:Toshiba
1252:Teranex
1158:). The
1080:OpenJDK
958:AltiVec
940:SIMDx86
936:libSIMD
846:AVX-512
831:Philips
819:MIPS-3D
746:(MAX),
741:PA-RISC
733:PowerPC
725:AltiVec
627:Teranex
451:parsing
398:AVX-512
390:AVX-512
374:PowerPC
367:AltiVec
340:PA-RISC
311:-style
265:History
257:Modern
4787:
4664:OpenCL
4659:OpenMP
4604:Chapel
4521:shared
4516:Memory
4451:(SIMT)
4394:Models
4305:Thread
4237:Theory
4208:(SpMT)
4162:Memory
4147:Thread
4130:Levels
3909:Switch
3899:Analog
3637:(IMC)
3608:(MMU)
3457:others
3432:64-bit
3427:48-bit
3422:32-bit
3417:24-bit
3412:16-bit
3407:15-bit
3402:12-bit
3239:Mobile
3155:Stream
3150:Barrel
3145:Vector
3134:(GPU)
3093:(SUPS)
3061:(IPC)
2913:Memory
2906:Vector
2889:Thread
2872:Scalar
2674:Others
2621:RISC-V
2586:SuperH
2555:Power
2551:MIPS-X
2526:PDP-11
2375:Fabric
2127:Models
2082:GitHub
1951:GitHub
1933:01.org
1551:
1541:
1510:
1411:OpenCL
1293:since
1204:, and
1088:OpenMP
1057:2.0+.
974:iTunes
919:3DNow!
896:3DNow!
833:, now
779:3DNow!
771:SSE4.x
674:MasPar
596:(DAP)
554:page.
534:ARM's
522:RISC-V
396:, and
302:Cray-1
4634:Dryad
4599:Boost
4320:Array
4310:Fiber
4224:(CMT)
4197:(SMT)
4111:GPGPU
3965:(PPW)
3923:Power
3815:Adder
3691:Array
3658:Logic
3619:(TLB)
3602:(FPU)
3596:(AGU)
3590:(ALU)
3580:units
3516:Cache
3397:8-bit
3392:4-bit
3387:1-bit
3351:(TPU)
3345:(DSP)
3339:(PPU)
3333:(VPU)
3322:(GPU)
3291:(NoC)
3274:(SoC)
3209:(PoP)
3203:(SiP)
3197:(MCM)
3138:GPGPU
3128:(CPU)
3118:Types
3099:(PPW)
3087:(TPS)
3075:(IPS)
3067:(CPI)
2838:Level
2649:S/390
2644:S/370
2639:S/360
2581:SPARC
2559:POWER
2442:TRIPS
2410:Types
2078:simde
1977:(PDF)
1915:(PDF)
1908:(PDF)
1829:(PDF)
1549:S2CID
1508:S2CID
1473:(PDF)
1438:(PDF)
1167:Glibc
1148:Clang
1055:Swift
1014:, or
990:XCode
944:SLEEF
931:Intel
880:GPGPU
839:Xetal
787:SPARC
767:SSSE3
748:Intel
717:Alpha
701:from
699:Xplor
687:from
617:from
418:pixel
378:POWER
4699:ROCm
4629:CUDA
4619:Cilk
4586:APIs
4546:COMA
4541:NUMA
4472:MIMD
4467:MISD
4444:SIMD
4439:SISD
4167:Loop
4157:Data
4152:Task
3943:ACPI
3676:Glue
3568:FIFO
3511:Core
3249:ASIP
3190:CPLD
3185:FPOA
3180:FPGA
3175:ASIC
3028:SPMD
3023:MIMD
3018:MISD
3011:SWAR
2991:SIMD
2986:SISD
2901:Data
2884:Task
2855:Word
2601:M32R
2546:MIPS
2509:sets
2476:ZISC
2471:NISC
2466:OISC
2461:MISC
2454:EPIC
2449:VLIW
2437:EDGE
2427:RISC
2422:CISC
2331:HUMA
2326:NUMA
1959:2019
1890:2019
1811:2020
1707:2020
1682:2020
1657:2020
1539:ISBN
1448:C-21
1378:SSE3
1374:SSE2
1335:NUMA
1331:Sony
1329:and
1295:1998
1268:HDTV
1260:NTSC
1244:GAPP
1219:and
1179:Dart
1156:/Qax
1096:Cilk
1072:.NET
1043:LLVM
1037:The
1016:SWAR
998:SSE3
996:and
994:SSE2
984:and
982:APIs
976:and
968:and
948:libm
942:and
925:and
894:and
815:MDMX
811:MIPS
807:Neon
799:MAJC
769:and
764:SSE3
760:SSE2
731:for
727:and
695:2001
681:1991
656:1985
646:NASA
629:and
611:1981
601:1976
590:1974
580:1974
572:Year
512:SSE2
423:DSPs
394:AVX2
388:and
386:AVX2
352:MDMX
324:MIMD
290:Cray
244:SIMT
193:SIMD
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166:SPMD
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119:SIMD
103:MISD
98:SISD
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4704:UPC
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3553:Bus
3170:PAL
2845:Bit
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