178:) which executes the following instruction a fixed number of times, possibly incrementing one or both of the address fields of that instruction. This compensates for the architecture's lack of
390:
259:
instruction. Fields in the instruction determine the loop termination condition. In the case of the TMS320, a block of up to 64Kbytes can be repeated.
235:
digital signal processor (1983) includes an instruction for repeating a single-cycle instruction or two single-cycle instruction in parallel (
228:). These instructions repeat an operation and decrement a counter until it is zero, or may also stop when a certain condition is met.
447:
122:
416:
311:
224:) which are called "repeat string operation prefixes" and may only be applied to a small number of string instructions (
437:
442:
341:
136:
36:
363:
408:
Real-time
Digital Signal Processing: Implementations, Applications, and Experiments with the TMS320C55X
147:
which repeatedly executes another instruction a fixed number of times, or until some condition is met.
115:
79:
406:
232:
190:
108:
275:
Rossman, George E. (December 1975). "A Course of Study in
Computer Hardware Architecture".
8:
151:
96:
292:
329:
Conrad
Weisert, "Simulating an Obsolete Computer in 1960", Part 1: The main processor
412:
284:
171:
296:
58:
330:
84:
179:
46:
431:
186:
288:
144:
51:
22:
202:
163:
150:
Since it is an instruction that operates on other instructions like the
74:
349:. General Electric Computer Department. July 1964. p. A-6.
255:
The instruction or instruction pair to be executed follows the
41:
383:
Intel 64 and IA-32 Architectures
Software Developer's Manual
239:) and an instruction for repeating a block of instructions (
220:, includes a series of special-purpose repeat instructions (
16:
Machine instruction executing another instruction repeatedly
217:
213:
243:). These use special block-repeat counter registers (
193:
series (1964) supports a single-instruction repeat (
371:. General Electric Information Systems. July 1964.
313:Reference Manual: Univac Scientific 1103A Computer
429:
381:Intel Corporation, "Instruction Set Reference",
154:, it has been classified as a meta-instruction.
385:, Order Number 253667-060US, September 2016,
116:
137:computer instruction set architectures (ISA)
358:
356:
319:. Remington Rand Univac. 1956. p. 30.
123:
109:
400:
398:
365:GE-625/635 Programming Reference Manual
353:
274:
226:INS, OUTS, MOVS, LODS, STOS, CMPS, SCAS
430:
395:
334:
404:
13:
157:
14:
459:
197:), a double-instruction repeat (
411:. æž
ć性ćŠćșç瀟æéć
Źćž. pp. 67â68.
375:
323:
304:
268:
1:
448:Instruction set architectures
250:
145:machine language instruction
7:
10:
464:
262:
233:Texas Instruments TMS320
438:Central processing unit
289:10.1109/C-M.1975.218835
216:ISA, starting with the
443:Instruction processing
405:Kuo, Sen-Maw (2003).
343:GE-635 System Manual
152:execute instruction
97:Execute instruction
166:(1953) includes a
141:repeat instruction
92:Repeat instruction
418:978-7-302-07700-8
133:
132:
455:
423:
422:
402:
393:
379:
373:
372:
370:
360:
351:
350:
348:
338:
332:
327:
321:
320:
318:
308:
302:
300:
272:
246:
242:
238:
227:
223:
222:REP(â
/E/Z/NE/NZ)
208:
200:
196:
177:
172:op code mnemonic
125:
118:
111:
29:General concepts
19:
18:
463:
462:
458:
457:
456:
454:
453:
452:
428:
427:
426:
419:
403:
396:
380:
376:
368:
362:
361:
354:
346:
340:
339:
335:
328:
324:
316:
310:
309:
305:
273:
269:
265:
253:
244:
240:
236:
225:
221:
206:
198:
194:
180:index registers
175:
160:
158:Computer models
129:
85:Indirect branch
37:Instruction set
17:
12:
11:
5:
461:
451:
450:
445:
440:
425:
424:
417:
394:
374:
352:
333:
322:
303:
266:
264:
261:
252:
249:
191:Honeywell 6000
159:
156:
131:
130:
128:
127:
120:
113:
105:
102:
101:
100:
99:
94:
89:
88:
87:
77:
69:
68:
64:
63:
62:
61:
56:
55:
54:
49:
47:Illegal opcode
39:
31:
30:
26:
25:
15:
9:
6:
4:
3:
2:
460:
449:
446:
444:
441:
439:
436:
435:
433:
420:
414:
410:
409:
401:
399:
392:
388:
384:
378:
367:
366:
359:
357:
345:
344:
337:
331:
326:
315:
314:
307:
298:
294:
290:
286:
283:(12): 44â63.
282:
278:
277:IEEE Computer
271:
267:
260:
258:
248:
234:
229:
219:
215:
210:
204:
192:
188:
183:
181:
173:
170:instruction (
169:
165:
155:
153:
148:
146:
142:
138:
126:
121:
119:
114:
112:
107:
106:
104:
103:
98:
95:
93:
90:
86:
83:
82:
81:
78:
76:
73:
72:
71:
70:
66:
65:
60:
57:
53:
50:
48:
45:
44:
43:
40:
38:
35:
34:
33:
32:
28:
27:
24:
21:
20:
407:
386:
382:
377:
364:
342:
336:
325:
312:
306:
280:
276:
270:
256:
254:
230:
211:
184:
167:
161:
149:
140:
134:
91:
67:Instructions
52:Opcode table
23:Machine code
203:linked-list
164:Univac 1103
432:Categories
245:BRC0, BRC1
391:full text
251:Semantics
201:), and a
205:repeat (
389::4-550
301:, p. 50
59:Operand
415:
297:977792
295:
257:repeat
187:GE-600
168:repeat
80:Branch
42:Opcode
369:(PDF)
347:(PDF)
317:(PDF)
293:S2CID
263:Notes
176:RPjnw
143:is a
413:ISBN
241:RPTC
231:The
218:8086
212:The
199:RPTD
185:The
162:The
139:, a
285:doi
247:).
237:RPT
214:x86
209:).
207:RPL
195:RPT
135:In
75:NOP
434::
397:^
387:2B
355:^
291:.
279:.
182:.
174::
421:.
299:.
287::
281:8
189:/
124:e
117:t
110:v
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.