632:
940:. Cypress Cove is identical to Sunny Cove, aside from a number of improvements and other changes. Notably the L1 data cache latency has been reduced from five cycles that is on Sunny Cove to just three cycles on Cypress Cove by change from 8 way associativity on Sunny Cove to 12 way associativity On Cypress Cove. Intel claims an increase of 19% in IPC in Cypress Cove-based Rocket Lake processors compared to
484:
460:
Intel released details of Ice Lake and its microarchitecture, Sunny Cove, during Intel
Architecture Day in December 2018, stating that the Sunny Cove cores would be focusing on single-thread performance, new instructions, and scalability improvements. Intel stated that the performance improvements
472:
scheme supports a linear address space up to 57 bits and a physical address space up to 52 bits, increasing the virtual memory space to 128 petabytes, up from 256 terabytes, and the addressable physical memory to 4 petabytes, up from 64 terabytes.
468:. The core has also increased in width, by increasing execution ports from eight to ten and by doubling the L1 store bandwidth. Allocation width has also increased from four to five. The
1224:
3510:
3481:
464:
Sunny Cove features a 50% increase in the size of L1 data cache, a larger L2 cache dependent on product size, larger ÎĽOP cache, and larger second-level
2494:
2692:
2311:
1250:
2499:
17:
1096:
421:). 10th-generation Intel Core mobile processors were released in September 2019, while the Xeon server processors were released on April 6, 2021.
2597:
2509:
1070:
2514:
2504:
2489:
2316:
1476:
1148:
1121:
1450:
2306:
932:
is a CPU microarchitecture based on the Sunny Cove microarchitecture designed for 10 nm, backported to 14 nm. It succeeds the
259:
1519:
1423:
3447:
2542:
953:). Rocket Lake and its underlying microarchitecture were first described in November 2020, and was later released on March 30, 2021.
1015:
833:
1040:
1344:
2602:
1202:
631:
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1663:
1648:
1572:
1562:
968:
1398:
1177:
1567:
1587:
1582:
1577:
572:
Wider decoder (from skylake's 3 simple + 1 complex 4 way decoding to Sunny cove's 4 simple + 1 complex 5 wide decoder)
3566:
2361:
2218:
2678:
2552:
2532:
1795:
1641:
1619:
1614:
1609:
1604:
1557:
1552:
400:
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1225:"Intel Sunny Cove Core To Deliver A Major Improvement In Single-Thread Performance, Bigger Improvements To Follow"
3556:
3305:
2477:
1624:
1599:
1275:
442:
3123:
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1759:
1730:
1512:
3359:
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393:
328:
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3066:
2659:
1833:
1783:
1747:
862:
774:
465:
215:
177:
31:
3289:
3254:
3171:
3147:
3137:
3047:
3023:
2933:
2850:
1857:
1828:
1820:
1778:
1766:
1742:
933:
911:
496:
336:
1636:
3033:
2824:
1735:
1301:
829:
255:
3325:
2867:
2612:
1505:
956:
800:
409:
304:
296:
227:
219:
2992:
2925:
2812:
2390:
1542:
1528:
2670:
972:
434:). Cypress Cove is a version of the Sunny Cove microarchitecture backported to Intel's 14 nm
2912:
2884:
2831:
2654:
2629:
2223:
609:
381:
3430:
2970:
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2702:
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1700:
1690:
1685:
1653:
522:
492:
2634:
2356:
796:
223:
203:
2899:
1966:
993:). Cypress Cove is implemented on 11th-generation Intel Core desktop processors (codenamed
858:
211:
2236:
1345:"Examining Intel's Ice Lake Processors: Taking a Bite of the Sunny Cove Microarchitecture"
8:
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846:
601:
267:
199:
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1938:
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2405:
2289:
2259:
1399:"Intel Rocket Lake (14nm) Review: Core i9-11900K, Core i7-11700K, and Core i5-11600K"
1178:"Intel's Architecture Day 2018: The Future of Core, Intel GPUs, 10nm, and Hybrid x86"
385:
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2342:
2140:
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microarchitecture, which powers the 11th-generation Intel Core mobile processors.
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1997:
1970:
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Cypress Cove is implemented on 11th Gen Intel Core desktop processors (codenamed
757:
512:
160:
3213:
2984:
2855:
1097:"Intel's 11th Gen Core Tiger Lake SoC Detailed: SuperFin, Willow Cove and Xe-LP"
3561:
2872:
2862:
2845:
2819:
2798:
2784:
2763:
2537:
2201:
1315:
1251:"Intel Announces 10th Gen Core Processors Based On 10nm Ice Lake, Now Shipping"
518:
Dynamic Tuning 2.0 which allows the CPU to stay at turbo frequencies for longer
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2154:
2113:
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1276:"Intel Ice Lake 10nm CPU Benchmark Leak Shows More Cache, Higher Performance"
454:
424:
There are no desktop products featuring Sunny Cove. However, a variant named
1149:"Intel launches new processors that bring AI to the PC, sired by Haifa team"
1071:"Intel's 11th Gen Core Rocket Lake Detailed: Ice Lake Core with Xe Graphics"
550:
3452:
3413:
3364:
3233:
3094:
2417:
2103:
1754:
1016:"Intel teases its Ice Lake & Tiger Lake family, 10nm for 2018 and 2019"
937:
763:
483:
435:
397:
166:
1451:"Intel Rocket Lake Price, Benchmarks, Specs and Release Date, All We Know"
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is used for the 11th-generation Intel Core desktop processors (codenamed
363:
355:
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2018:
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1695:
1477:"Intel's new 11th-gen Rocket Lake-S CPU: Everything you need to know"
695:
612:
98:
1041:"Media Alert: Intel to Launch 3rd Gen Intel Xeon Scalable Portfolio"
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2836:
2700:
2617:
2196:
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would be achieved by making the core "deeper, wider, and smarter".
453:
Sunny Cove was designed by Intel Israel's processor design team in
30:"Sunny Cove" redirects here. For the park in Resurrection Bay, see
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microarchitecture, and is manufactured using Intel's 14 nm
441:
The direct successor to the Sunny Cove microarchitecture is the
3082:
2572:
2338:
2191:
2176:
1885:
1717:
1424:"11th Gen Intel Core: Unmatched Overclocking, Game Performance"
854:
824:
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783:
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251:
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207:
186:
169:
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Distributed scheduling queues (4 scheduling queues, up from 2)
2136:
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71:
1122:"Intel launches 10th gen core processor developed in Israel"
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2149:
1945:
986:
871:
867:
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1.55x larger integer register file (280-entry, up from 180)
508:
Larger micro-instruction cache (2304 entries, up from 1536)
414:
243:
235:
231:
592:
1.33x larger vector register file (224-entry, up from 168)
403:. The microarchitecture is implemented in 10th-generation
2078:
2030:
1817:
779:
182:
969:
Ice Lake (microprocessor) § List of Ice Lake CPUs
581:
1.65x larger scheduler (160-entry, up from 97 entries)
502:
Increase L1 data cache: 48 kiB (from 32 kiB)
499:
running at the same frequency and memory configuration
1195:
392:, first released in September 2019. It succeeds the
396:microarchitecture and is fabricated using Intel's
1171:
1169:
3548:
3279:Backported Sunny Cove microarchitecture for 14nm
1884:
1166:
2686:
1513:
27:Intel CPU microarchitecture launched in 2019
973:Rocket Lake § List of Rocket Lake CPUs
575:1.6x larger ROB (352, up from 224 entries)
2693:
2679:
1520:
1506:
1338:
1336:
630:
521:Hardware acceleration for SHA operations (
977:Sunny Cove powers the 10th generation of
3061:L3-cache introduced, 256KB L2-cache/core
1013:
2598:Process–architecture–optimization model
1474:
1396:
1342:
1333:
1175:
1146:
1094:
1068:
584:Larger dispatch (10-way, up from 8-way)
14:
3549:
2760:
1448:
1014:Garreffa, Anthony (January 21, 2016).
989:Scalable server processors (codenamed
417:scalable server processors (codenamed
2840:
2738:
2674:
1501:
1392:
1390:
1248:
1222:
1527:
1064:
1062:
3525:indicates cancelled processors
3081:Introduced GPU on same package and
1316:"Dynamic Tuning - Intel - WikiChip"
1268:
1147:Solomon, Shoshanna (May 28, 2019).
24:
3142:Fully integrated voltage regulator
1475:Mah Ung, Gordon (March 16, 2021).
1387:
1176:Cutress, Ian (December 12, 2018).
25:
3578:
3269:
1069:Cutress, Ian (October 29, 2020).
1059:
1047:. Santa Clara, CA. March 22, 2021
636:Cypress Cove die from an i5-11400
407:processors for mobile (codenamed
3179:introduced on mainstream desktop
2613:Intel HD, UHD, and Iris Graphics
1203:"5-Level Paging and 5-Level EPT"
1095:Cutress, Ian (August 13, 2020).
482:
18:Cypress Cove (microarchitecture)
3009:4 cores on mainstream desktop,
1701:P6 variant (Enhanced Pentium M)
1468:
1449:Alcorn, Paul (March 23, 2021).
1442:
1416:
1397:Cutress, Ian (March 30, 2021).
1362:
1308:
1282:. HotHardware. October 23, 2018
1242:
752:Architecture and classification
619:
476:
155:Architecture and classification
3472:Low power mobile only (9-30W)
3259:10 cores on mainstream desktop
1343:Cutress, Ian (July 30, 2019).
1216:
1140:
1114:
1088:
1033:
1007:
985:) and the third generation of
13:
1:
3249:8 cores on mainstream desktop
3208:6 cores on mainstream desktop
3099:On-die ring bus, no more non-
2701:Intel CPU core roadmaps from
1249:Schor, David (May 28, 2019).
1223:Schor, David (May 28, 2019).
1000:
981:mobile processors (codenamed
959:is removed from Rocket Lake.
1370:"Intel® Deep Learning Boost"
32:Sunny Cove State Marine Park
7:
3531:are microarchitectures
962:
491:On average 18% increase in
448:
10:
3583:
2736:
2725:
2720:
966:
882:Products, models, variants
515:(352, up from 224 entries)
285:Products, models, variants
29:
3515:
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3427:
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3141:
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3055:reintroduced, integrated
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1995:
1965:
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1128:(in Hebrew). May 28, 2019
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3567:Intel microarchitectures
610:artificial intelligence
413:) and third generation
3557:X86 microarchitectures
3537:are future processors
3386:Hybrid, DDR5, PCIe 5.0
1696:P6 variant (Pentium M)
1300:: CS1 maint: others (
523:Secure Hash Algorithms
505:L2 cache: 512 kiB
495:in comparison to 2015
652:; 3 years ago
532:instruction subsets:
55:; 5 years ago
3331:512 KB L2-cache/core
775:Instruction set
758:Technology node
178:Instruction set
161:Technology node
1153:The Times of Israel
675:Common manufacturer
650:March 30, 2021
642:General information
626:
602:Deep Learning Boost
78:Common manufacturer
45:General information
41:
2977:Nehalem (NetBurst)
2495:Sandy Bridge-based
1664:Microarchitectures
1649:Microarchitectures
624:
290:Product code names
39:
3544:
3543:
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2958:Cedarmill (Tejas)
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1954:
1953:
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927:
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887:Product code name
386:microarchitecture
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16:(Redirected from
3574:
2713:
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2500:Ivy Bridge-based
2091:8/16-bit databus
1963:
1962:
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1878:Current products
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1529:Intel processors
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1499:
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1430:. March 15, 2021
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606:machine learning
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56:
42:
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3429:
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3349:graphics engine
3060:
2806:
2792:
2778:
2706:
2705:to Panther Lake
2699:
2669:
2664:
2593:Tick–tock model
2577:
2521:
2510:Broadwell-based
2401:Extreme Edition
2333:
2131:
2073:
2024:
1991:
1950:
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1126:en.globes.co.il
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513:re-order buffer
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116:KB instructions
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2348:
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2326:
2321:
2320:
2319:
2314:
2312:NetBurst-based
2309:
2299:
2294:
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2292:
2287:
2282:
2277:
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2262:
2257:
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2118:32-bit databus
2116:
2111:
2106:
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2100:16-bit databus
2098:
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2016:
2010:
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1455:Tom's Hardware
1441:
1428:Intel Newsroom
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1386:
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1267:
1241:
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1045:Intel Newsroom
1032:
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470:5-level paging
450:
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94:
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69:
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60:September 2019
53:September 2019
51:
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26:
9:
6:
4:
3:
2:
3579:
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3229:Goldmont Plus
3225:
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3221:
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3205:
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2807:(166–200 MHz)
2805:
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2800:
2796:
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2516:
2515:Skylake-based
2513:
2511:
2508:
2506:
2505:Haswell-based
2503:
2501:
2498:
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2490:Nehalem-based
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1981:
1978:
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1968:
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1851:Goldmont Plus
1849:
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1297:
1281:
1277:
1271:
1256:
1255:WikiChip Fuse
1252:
1245:
1230:
1229:WikiChip Fuse
1226:
1219:
1211:
1204:
1198:
1183:
1179:
1172:
1170:
1154:
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1123:
1117:
1106:September 29,
1102:
1098:
1091:
1076:
1072:
1065:
1063:
1046:
1042:
1036:
1021:
1017:
1010:
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996:
992:
988:
984:
980:
974:
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952:
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945:
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923:
920:
916:
913:
910:
906:
901:
895:
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891:
889:
885:
880:
873:
869:
866:
864:
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843:
839:
835:
831:
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826:
822:
818:
814:
810:
806:
802:
798:
795:
794:
792:
788:
785:
781:
778:
776:
772:
768:
765:
761:
759:
755:
750:
742:
738:
730:
726:
715:
708:
707:
704:KB per core:
699:
697:
692:
687:
680:
679:
677:
673:
670:
667:
663:
649:
645:
640:
633:
628:
614:
611:
607:
603:
599:
594:
591:
588:
583:
580:
579:
577:
576:
574:
571:
567:
564:
562:
559:
557:
554:
552:
549:
547:
544:
542:
539:
537:
534:
533:
531:
527:
524:
520:
517:
514:
510:
507:
504:
501:
498:
494:
490:
489:
485:
481:
480:
474:
471:
467:
462:
458:
456:
455:Haifa, Israel
446:
444:
439:
437:
433:
432:
427:
422:
420:
416:
412:
411:
406:
402:
399:
395:
391:
388:developed by
387:
383:
379:
365:
362:
357:
354:
353:
351:
347:
338:
335:
330:
327:
326:
324:
320:
315:
306:
303:
298:
295:
294:
292:
288:
283:
277:
273:
269:
265:
261:
257:
253:
249:
245:
241:
237:
233:
229:
225:
221:
217:
213:
209:
205:
201:
198:
197:
195:
191:
188:
184:
181:
179:
175:
171:
168:
164:
162:
158:
153:
145:
141:
133:
129:
118:
111:
110:
107:KB per core:
102:
100:
95:
90:
83:
82:
80:
76:
73:
70:
66:
52:
48:
43:
37:
33:
19:
3535:Italic names
3534:
3528:
3522:
3511:Panther Lake
3509:
3504:
3496:
3491:
3480:
3462:
3442:
3437:architecture
3419:Redwood Cove
3418:
3405:
3371:
3354:
3316:
3299:
3284:
3270:Cypress Cove
3264:
3234:Whiskey Lake
3223:
3184:
3166:
3132:
3108:
3103:motherboards
3095:Sandy Bridge
3090:Sandy Bridge
3089:
3042:
3018:
2999:
2975:
2956:
2940:
2892:NetBurst(HT)
2879:
2768:
1959:Discontinued
1796:Cypress Cove
1790:
1755:Sandy Bridge
1484:. Retrieved
1480:
1470:
1458:. Retrieved
1454:
1444:
1432:. Retrieved
1427:
1418:
1406:. Retrieved
1402:
1377:. Retrieved
1373:
1364:
1352:. Retrieved
1348:
1323:. Retrieved
1319:
1310:
1284:. Retrieved
1279:
1270:
1258:. Retrieved
1254:
1244:
1232:. Retrieved
1228:
1218:
1209:
1197:
1185:. Retrieved
1181:
1156:. Retrieved
1152:
1142:
1130:. Retrieved
1125:
1116:
1104:. Retrieved
1100:
1090:
1078:. Retrieved
1074:
1049:. Retrieved
1044:
1035:
1023:. Retrieved
1019:
1009:
994:
990:
982:
976:
955:
948:
946:
938:process node
930:Cypress Cove
929:
928:
625:Cypress Cove
620:Cypress Cove
615:acceleration
477:Improvements
463:
459:
452:
440:
436:process node
429:
426:Cypress Cove
425:
423:
418:
408:
401:process node
377:
376:
322:Predecessors
36:
3505:Cougar Cove
3428:Mobile-only
3424:Meteor Lake
3396:Raptor Lake
3392:Raptor Cove
3377:Golden Cove
3372:Golden Cove
3337:Willow Cove
3311:Mobile-only
3306:Cannon Lake
3304:Palm Cove (
3274:Rocket Lake
3244:Coffee Lake
3238:Mobile-only
3218:Mobile-only
3204:Coffee Lake
2926:Prescott‑2M
2804:Pentium Pro
2790:Pentium Pro
2776:Pentium Pro
1808:Golden Cove
1803:Willow Cove
1784:Cannon Lake
1286:November 9,
1280:HotHardware
1212:. May 2017.
1187:January 14,
995:Rocket Lake
991:Ice Lake-SP
950:Rocket Lake
922:Golden Cove
908:Predecessor
894:Rocket Lake
747:MB per core
735:KB per core
665:Designed by
604:, used for
443:Willow Cove
431:Rocket Lake
419:Ice Lake-SP
364:Golden Cove
356:Willow Cove
305:Ice Lake-SP
150:MB per core
138:KB per core
68:Designed by
3551:Categories
3529:Bold names
3482:Arrow Lake
3468:Lunar Lake
3381:Alder Lake
3368:(10nm ESF)
3341:Tiger Lake
3322:Sunny Cove
3317:Sunny Cove
3265:Sunny Cove
3255:Comet Lake
3214:Amber Lake
3124:Ivy Bridge
3114:Silvermont
3109:Silvermont
3013:introduced
2985:Cedar Mill
2934:Smithfield
2856:Willamette
2851:Coppermine
2752:Microarch.
2744:Microarch.
2717:Atom (ULV)
2603:Intel GPUs
2317:Core-based
2081:(external
1969:oriented (
1839:Silvermont
1791:Sunny Cove
1760:Ivy Bridge
1543:Processors
1158:October 6,
1132:October 6,
1001:References
979:Intel Core
942:Comet Lake
790:Extensions
764:14 nm
657:2021-03-30
578:Scheduler
551:VPCLMULQDQ
405:Intel Core
398:10 nm
384:for a CPU
378:Sunny Cove
349:Successors
193:Extensions
167:10 nm
40:Sunny Cove
3463:Lion Cove
3410:Crestmont
3406:Crestmont
3360:Gracemont
3355:Gracemont
3195:Kaby Lake
3158:Broadwell
2898:NetBurst(
2880:Pentium M
2873:Northwood
2825:Deschutes
2793:(150 MHz)
2779:(133 MHz)
2723:Node name
2655:Codenames
2568:StrongARM
2406:Dual-Core
2379:Dual-Core
2290:Dual-Core
2260:OverDrive
2209:A100/A110
2202:OverDrive
1996:pre-x86 (
1863:Gracemont
1772:Broadwell
1403:AnandTech
1379:August 1,
1354:August 1,
1349:AnandTech
1296:cite news
1182:AnandTech
1101:AnandTech
1075:AnandTech
1020:TweakTown
918:Successor
613:inference
536:VPOPCNTDQ
394:Palm Cove
329:Palm Cove
3497:Darkmont
3492:Darkmont
3477:? (TSMC)
3326:Ice Lake
3190:Goldmont
3185:Goldmont
3077:Westmere
3067:Saltwell
2918:Prescott
2868:Tualatin
2837:NetBurst
2660:Larrabee
2538:iAPX 432
2473:11th gen
2468:10th gen
2307:P6-based
2197:RapidCAD
1939:14th gen
1934:13th gen
1929:12th gen
1924:11th gen
1919:10th gen
1846:Goldmont
1834:Saltwell
1748:Westmere
1708:NetBurst
1654:Chipsets
1486:April 6,
1460:April 6,
1434:April 6,
1408:April 6,
1374:Intel AI
1320:WikiChip
1080:April 6,
1051:April 9,
983:Ice Lake
963:Products
740:L3 cache
728:L2 cache
647:Launched
449:Features
410:Ice Lake
382:codename
367:(server)
359:(mobile)
340:(server)
332:(mobile)
308:(server)
300:(mobile)
297:Ice Lake
143:L3 cache
131:L2 cache
50:Launched
3448:Skymont
3443:Skymont
3435:chiplet
3414:Intel 4
3365:Intel 7
3300:Skylake
3290:Tremont
3285:Tremont
3246:Refresh
3172:Skylake
3167:Skylake
3148:Airmont
3138:Haswell
3133:Haswell
3048:Nehalem
3043:Nehalem
3024:Bonnell
3019:Bonnell
2993:Presler
2813:Klamath
2729:Pentium
2650:Stratix
2586:Related
2548:Itanium
2463:9th gen
2458:8th gen
2453:7th gen
2448:6th gen
2443:5th gen
2438:4th gen
2433:3rd gen
2428:2nd gen
2423:1st gen
2386:Pentium
2369:Celeron
2329:Tolapai
2250:Pentium
2233:(1998)
2231:Celeron
2122:80387DX
2114:80387SX
1909:Pentium
1904:Celeron
1858:Tremont
1829:Bonnell
1779:Skylake
1767:Haswell
1743:Nehalem
1642:Itanium
1558:Pentium
1553:Celeron
1481:PCWorld
1325:May 28,
1260:May 28,
1234:May 28,
1025:June 3,
934:Skylake
912:Skylake
903:History
838:AVX-512
769:process
720:KB data
655: (
530:AVX-512
511:Larger
497:Skylake
337:Skylake
317:History
264:AVX-512
172:process
123:KB data
58: (
3083:AES-NI
3034:Penryn
2913:Dothan
2885:Banias
2863:130 nm
2846:180 nm
2832:Katmai
2820:250 nm
2799:350 nm
2785:500 nm
2764:600 nm
2573:XScale
2343:64-bit
2339:x86-64
2244:(2004)
2141:32-bit
2104:80C187
2097:(1980)
2070:(1982)
2064:(1982)
2058:(1982)
2052:(1979)
2046:(1978)
2035:16-bit
2029:Early
2021:(1977)
2015:(1974)
2009:(1972)
1988:(1974)
1982:(1971)
1890:64-bit
1886:x86-64
1736:Penryn
1722:64-bit
1718:x86-64
1677:32-bit
971:, and
855:RDRAND
825:SSE4.2
821:SSE4.1
784:x86-64
767:FinFET
762:Intel
745:
733:
718:
711:
702:
600:Intel
546:BITALG
252:SSE4.2
248:SSE4.1
208:RDRAND
200:AES-NI
187:x86-64
170:FinFET
165:Intel
148:
136:
121:
114:
105:
3562:Intel
3295:10 nm
3153:14 nm
3119:22 nm
3072:32 nm
3059:, PCH
3029:45 nm
3005:Merom
2971:Yonah
2966:65 nm
2942:Tejas
2908:90 nm
2645:PIIXs
2526:Other
2324:Quark
2137:IA-32
2127:80487
2109:80287
2068:80286
2062:80188
2056:80186
1998:8-bit
1971:4-bit
1673:IA-32
1637:Quark
1536:Lists
1210:Intel
1206:(PDF)
851:CLMUL
813:SSSE3
696:cache
689:Cache
681:Intel
669:Intel
541:VBMI2
390:Intel
380:is a
240:SSSE3
204:CLMUL
99:cache
92:Cache
84:Intel
72:Intel
3457:TSMC
3177:DDR4
3101:UEFI
3011:DDR3
3000:Core
2756:Step
2748:Step
2733:Core
2640:ICHs
2635:SCHs
2630:PCHs
2563:i960
2558:i860
2553:RISC
2543:EPIC
2533:CISC
2485:Xeon
2413:Core
2352:Atom
2302:Xeon
2297:Core
2214:Atom
2172:i486
2150:i386
2143:x86)
2095:8087
2083:FPUs
2050:8088
2044:8086
2019:8085
2013:8080
2007:8008
1986:4040
1980:4004
1946:Xeon
1914:Core
1899:Atom
1731:Core
1679:x86)
1632:Xeon
1595:Core
1548:Atom
1488:2021
1462:2021
1436:2021
1410:2021
1381:2019
1356:2019
1327:2019
1302:link
1288:2018
1262:2019
1236:2019
1189:2019
1160:2019
1134:2019
1108:2020
1082:2021
1053:2021
1027:2016
987:Xeon
872:VT-x
868:VT-d
842:FMA3
834:AVX2
817:SSE4
809:SSE3
805:SSE2
566:VNNI
561:VAES
556:GFNI
528:New
415:Xeon
276:VT-d
272:VT-x
268:FMA3
260:AVX2
244:SSE4
236:SSE3
232:SSE2
3501:18A
3453:N3B
3431:NPU
2623:Arc
2608:GMA
2357:SoC
2275:III
2265:Pro
2224:SoC
2187:DX4
2182:DX2
2160:376
2079:x87
2031:x86
1967:BCD
1821:ULV
1818:x86
1573:III
1563:Pro
997:).
957:SGX
863:TXT
859:SHA
847:AES
830:AVX
801:SSE
797:MMX
780:x86
731:512
694:L1
493:IPC
466:TLB
256:AVX
228:SSE
224:MMX
220:SGX
216:TXT
212:SHA
183:x86
134:512
97:L1
3553::
3433:,
3057:MC
3053:HT
2900:Ă—2
2770:P6
2703:P6
2618:Xe
2362:CE
2270:II
2219:CE
2192:SL
2177:SX
2165:EX
2155:SX
1691:P6
1686:P5
1620:i9
1615:i7
1610:i5
1605:i3
1568:II
1479:.
1453:.
1426:.
1401:.
1389:^
1372:.
1347:.
1335:^
1318:.
1298:}}
1294:{{
1278:.
1253:.
1227:.
1208:.
1180:.
1168:^
1151:.
1124:.
1099:.
1073:.
1061:^
1043:.
1018:.
944:.
870:,
861:,
857:,
853:,
849:,
840:,
836:,
832:,
823:,
819:,
815:,
811:,
807:,
803:,
799:,
782:,
716:48
709:32
700:80
457:.
438:.
274:,
270:,
266:,
262:,
258:,
254:,
250:,
246:,
242:,
238:,
234:,
230:,
226:,
222:,
218:,
214:,
210:,
206:,
202:,
185:,
119:48
112:32
103:80
3459:)
3455:(
3398:)
3394:(
3383:)
3379:(
3347:X
3343:)
3339:(
3328:)
3324:(
3308:)
3276:)
3272:(
2989:⇨
2953:→
2950:⇩
2947:→
2930:⇨
2922:⇨
2902:)
2731:/
2694:e
2687:t
2680:v
2478:M
2418:2
2396:D
2391:4
2374:D
2345:)
2341:(
2285:M
2280:4
2242:D
2237:M
2139:(
2085:)
2037:)
2033:(
2000:)
1973:)
1892:)
1888:(
1724:)
1720:(
1675:(
1625:M
1600:2
1588:M
1583:D
1578:4
1521:e
1514:t
1507:v
1490:.
1464:.
1438:.
1412:.
1383:.
1358:.
1329:.
1304:)
1290:.
1264:.
1238:.
1191:.
1162:.
1136:.
1110:.
1084:.
1055:.
1029:.
874:}
743:2
659:)
608:/
525:)
146:2
62:)
34:.
20:)
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