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Open collector

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673:) drivers have a strong pull-down strength but a weaker pull-up strength. The purpose is to reduce the overall power demand compared to using both a strong pull-up and a strong pull-down. A pure open-drain driver, by comparison, has no pull-up strength except for leakage current: all the pull-up action is on the external termination resistor. This is why the term "pseudo" has to be used here: there is some pull-up on the driver side when output is at high state, the remaining pull-up strength is provided by parallel-terminating the receiver at the far end to the high voltage, often using a switchable, on-die terminator instead of a separate resistor. 530: 443: 659: 211: 124: 501:
to interface different families of devices that have different operating voltage levels. The open collector transistor can be rated to withstand a higher voltage than the chip supply voltage. This technique is commonly used by logic circuits operating at 5 V or lower to drive higher voltage devices such as
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Because the pull-up resistor is external and does not need to be connected to the chip supply voltage, a lower or higher voltage than the chip supply voltage can be used instead (provided it does not exceed the absolute maximum rating of the chip's output). Open outputs are therefore sometimes used
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Another advantage is that more than one open-collector output can be connected to a single line. If all open collector outputs attached to a line are off (i.e. in the high-impedance state), the pull-up resistor will be the only device setting the line's voltage and will pull the line voltage high.
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But if one or more open-collector outputs attached to the line are on (i.e. conducting to ground), since any one of them are strong enough to overcome the pull-up resistor's limited ability to hold the voltage high, the line voltage will instead be pulled low. This
575:. The output will be high (true) only when all gates are in the high-impedance state, and will be low (false) otherwise, like Boolean AND. When treated as active-low logic, this behaves like Boolean OR, since the output is low (true) when any input is low. See 638:
One problem such open-collector and similar devices with a pull-up resistor is the resistor consumes power constantly while the output is low. Higher operating speeds require lower resistor values for faster pull-up, which consume even more power.
115:) have greater conductance than their PNP and pMOS relatives, so may be more commonly used for these outputs. Open outputs using PNP and pMOS transistors will use the opposite internal voltage rail used by NPN and nMOS transistors. 607:
was mistakenly used instead, the active device attempting to set the line voltage low would be in competition with the other devices attempting to set the line voltage high, which would result in unpredictable output and heat.
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logic states, as well as a control to turn off both transistors to isolate the output. This differs from open collector/drain output, which only use a single transistor that can only disconnect the output or connect it to
702:) for the input is not half-supply as was in DDR3 and may be higher. A comparison of both DDR3 and DDR4 termination schemes in terms of skew, eye aperture and power consumption was published in late 2011. 243:
Microelectronic devices using nMOS open drain output may provide a 'weak' (high-resistance, often on the order of 100 kΩ) internal pull-up resistor to connect the terminal in question to the positive
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For a pMOS open source output, the drain is internally connected to the low voltage rail, so the output instead connects to the low voltage rail when the transistor is on, or is hi-Z when off.
478:⎏ – NPN open emitter or similar output that can supply a relatively low-impedance high voltage when not turned off. Requires external pulldown. Capable of positive-logic wired-OR connection. 466:⎐ – NPN open collector or similar output that can supply a relatively low-impedance low voltage when not turned off. Requires external pullup. Capable of positive-logic wired-AND connection. 240:(undefined) because the MOSFET is not conducting, which is why nMOS open drain outputs require a pull-up resistor connected to a positive voltage rail for producing a high output voltage. 65:
typically connects to another terminal of that transistor. When the transistor is off, the output is internally disconnected from any internal power rail, a state called "high-impedance" (
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nMOS open drain output is pulled Low when the nMOS is conducting. In the nonconducting hi-Z state, an external resistor pulls the output High so the output's voltage does not float.
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For a nMOS open source output, the drain is internally connected to the positive voltage rail, so the source outputs a high voltage when the transistor is on and is hi-Z when off.
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For pMOS open drain, the output instead connects to the positive power rail when the transistor is on, and is hi-Z when off. This is sometimes called "open drain, drives high".
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For a PNP open emitter output, the collector is connected to the low voltage supply, so the emitter outputs a low voltage when the transistor is on and is hi-Z when off.
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and possibly avoid the need for an external pull-up. External pullups may be 'stronger' (lower resistance, perhaps 3 kΩ) to reduce signal rise times (like with
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Addenddum No. 6 to JESD8 – High Speed Transceiver Logic (HSTL) – A 1.5 V Output Buffer Supply Voltage Based Interface Standard for Digital Integrated Circuits
698:). The term POD in DDR4 referring only for termination type that is only parallel pull-up without the pull-down termination at the far end. The reference point (V 849: 880: 96:
are typically required to set the output during the Hi-Z state to a specific voltage. Analog applications include analog weighting, summing, limiting, and
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standardized the terms POD15, POD125, POD135, and POD12 for 1.5 V, 1.25 V, 1.35 V, and 1.2 V interface supply voltages respectively.
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For NPN open collector outputs, the emitter of the NPN transistor is internally connected to ground, so the NPN open collector internally forms either a
112: 969: 181:, so the collector outputs a high voltage when the transistor is on or is hi-Z when off. This is sometimes called "open collector, drives high". 761: 576: 815: 603:). Open-collector output enables one active device to drive the shared line without interference from the other inactive devices. If 545:
will pull the output high. But if any input is low, the output will be pulled low by the buffer for that input. This corresponds to
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transistor, which controls the transistor's switching to the IC's ground. The external output is the transistor's collector.
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By tying the output of several open collectors together and connecting to a pull-up resistor, the common line becomes a
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AND in active-high logic, or to wired OR in active-low logic, and allows multiple inputs to share the same output wire.
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of the device so their output voltage doesn't float. Such weak pullups reduce power consumption due to their lower
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Note: this section primarily deals with npn open collectors, however nMOS open drain generally applies as well.
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with an exposed terminal that is internally unconnected (i.e. "open"). One of the IC's internal high or low
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For PNP open collector outputs, the emitter of the PNP transistor is internally connected to the positive
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These open outputs configurations are often used for digital applications when the transistor acts as a
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Also when driving a load, current through the pull-up resistor reduces the output high voltage by a
1090: 561: 554: 546: 305:, the strength of the internal pull-up, and allow disabling internal pullups when not desired. 89: 54: 174:, which pulls the output voltage to the resistor's supply voltage when the transistor is off. 163: 1197: 1151: 529: 251: 236:
when a low voltage is applied to the gate. The voltage in this high impedance state would be
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uses POD12 drivers but with the same driver strength (34 Ω/48 Ω) for pull-down (R
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or "hi-Z") when the transistor is off. The output is usually connected to an external
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Open collector outputs can also be useful for analog weighting, summing, limiting,
542: 534: 470: 298: 171: 93: 78: 614:-1 devices use open collector for electrical signaling. SCSI-2 and SCSI-3 may use 481:⎑ – variant with an internal pull-down resistor to provide a low voltage when off. 994: 931: 592: 502: 658: 901: 538: 447: 233: 167: 104: 1274: 283: 210: 155: 1254: 1113: 647: 196: 195:
For an NPN open emitter output, the collector is connected to the positive
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may allow programming particular output pins to use open drain instead of
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Pseudo-open drain and Center-tab termination type termination schemes
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Transistor–transistor logic § Open collector wired logic
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Configurations that internally connect to a high voltage are
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Configurations that internally connect to a low voltage are
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instead of BJTs, and expose the MOSFET's drain as output.
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processes an IC's output through the base of an internal
132: 734:: Consists of transistors to source and sink current in 724:: Consists of transistors to source and sink current in 755: 753: 73:, which use a pair of transistors to output a specific 630:, etc., but such applications are not discussed here. 127:
NPN open collector output schematic. A signal from an
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equal to the current times resistance, according to
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An nMOS open drain output connects to ground when a
537:. If all inputs are high, each buffer will be in a 275: 113:metal oxide semiconductor field effect transistor 1272: 69:). Open outputs configurations thus differ from 27:Transistor switch output for integrated circuits 232:is applied to the MOSFET's gate, or presents a 53:configurations that process the IC's internal 1098: 718:: Used more for analog voltages than digital. 533:Four inputs are connected to open-collector 328: 1045:POD135 – 1.35 V Pseudo Open Drain Interface 766:(2nd ed.). Cambridge University Press. 319:exposes the MOSFET's source as the output. 1105: 1091: 653: 1228:Current mode logic / Source-coupled logic 1057:POD12 – 1.2 V Pseudo Open Drain Interface 1021:POD15 – 1.5 V Pseudo Open Drain Interface 991:"Overview of SCSI Standards & Cables" 662:Pseudo open drain usage in DDR interfaces 495: 334:Summary of different open configurations 657: 528: 441: 209: 122: 800: 290:) or to minimize noise (like on system 88:, to allow for logic-level conversion, 14: 1273: 1086: 959: 760:Paul Horowitz; Winfield Hill (1989). 716:common terminal transistor amplifiers 364:HIGH voltage connected to collector 840:"source driver, (current-) | JEDEC" 473:to provide a high voltage when off. 437: 402:LOW voltage connected to collector 345:internal voltage supply connection 192:exposes the emitter as the output. 24: 1112: 394:HIGH voltage connected to emitter 166:, or an open-circuit (technically 25: 1292: 1078: 871:"sink driver, (current-) | JEDEC" 413:HIGH voltage connected to source 356:LOW voltage connected to emitter 118: 962:"Basics: Open Collector Outputs" 633: 521:requiring more than 100 V. 383:HIGH voltage connected to drain 375:LOW voltage connected to source 1192:Direct-coupled transistor logic 1062: 1050: 1038: 1026: 1014: 1002: 972:from the original on 2022-12-20 883:from the original on 2023-09-05 852:from the original on 2023-09-05 821:from the original on 2022-10-23 582: 487: 421:LOW voltage connected to drain 184: 983: 953: 924: 894: 863: 832: 794: 770: 524: 311: 13: 1: 960:Oskay, Windell (2012-02-29). 778:"open-emitter output | JEDEC" 743: 682: 205: 92:, and line sharing. External 628:digital-to-analog converters 454:Open output is indicated on 98:digital-to-analog converters 7: 1222:Transistor–transistor logic 1033:Pseudo Open Drain Interface 728:logic states, not just one. 705: 515:vacuum fluorescent displays 145:bipolar junction transistor 109:bipolar junction transistor 10: 1297: 1210:Integrated injection logic 552: 469:⎒ – variant with internal 450:with open-collector output 1237: 1216:Resistor–transistor logic 1204:Gunning transceiver logic 1167: 1140:Depletion-load NMOS logic 1120: 621: 587:Line sharing is used for 406: 387: 368: 349: 329:Summary of configurations 162:) when the transistor is 654:Pseudo open drain (POD) 446:Schematic symbol for a 276:{\displaystyle V^{2}/R} 223:MOS transistor (MOSFET) 90:wired-logic connections 1180:Diode–transistor logic 801:Kotzian, Jiri (2015). 763:The Art of Electronics 663: 562:wired logic connection 555:Wired logic connection 550: 496:Logic-level conversion 451: 277: 215: 136: 94:pull-up/down resistors 1198:Emitter-coupled logic 1152:Pass transistor logic 661: 532: 445: 278: 213: 141:open collector output 126: 252: 335: 190:Open emitter output 111:) and nMOS (n-type 1168:Other technologies 966:Evil Mad Scientist 664: 564:has several uses. 551: 452: 333: 317:Open source output 273: 216: 137: 47:integrated circuit 1268: 1267: 1146:Complementary MOS 1035:(September 2017). 999:081214 scsita.org 939:Texas Instruments 910:Texas Instruments 732:Three-state logic 667:Pseudo open drain 573:active high logic 425: 424: 342:exposed terminal 219:Open drain output 71:push–pull outputs 18:Pseudo open drain 16:(Redirected from 1288: 1281:Digital circuits 1260:Four-phase logic 1142:(including HMOS) 1107: 1100: 1093: 1084: 1083: 1072: 1066: 1060: 1054: 1048: 1042: 1036: 1030: 1024: 1018: 1012: 1006: 1000: 998: 993:. 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Index

Pseudo open drain
integrated circuit
pin
function
transistor
voltage rails
Hi-Z
push–pull outputs
voltage
current
switch
wired-logic connections
pull-up/down resistors
digital-to-analog converters
NPN BJT
bipolar junction transistor
metal oxide semiconductor field effect transistor

IC
BJT
bipolar junction transistor
pin
short-circuit
ground
switched on
high impedance
pull-up resistor
voltage rail
voltage rail

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