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the instruction. Once an instruction is completed by an execution unit, its output data is sent (with its tag) to the CAM. Any instructions that are dependent upon this particular datum (identified by its tag value) are then marked as ready for execution. In this way, subsequent instructions are
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for data dependencies between instructions in order to better organize the instruction sequences in the binary output files. The instructions are organized sequentially but the dependency information itself is not recorded in the binaries. Binaries compiled for a dataflow machine contain this
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follows the sequential order of the von
Neumann architecture, however within the window, instructions are allowed to be completed in data dependency order. This is accomplished in CPUs that dynamically tag the data dependencies of the code in the execution window. The logical complexity of
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Instructions and their data dependencies proved to be too fine-grained to be effectively distributed in a large network. That is, the time for the instructions and tagged results to travel through a large connection network was longer than the time to do many computations.
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Designs that use conventional memory addresses as data dependency tags are called static dataflow machines. These machines did not allow multiple instances of the same routines to be executed simultaneously because the simple tags could not differentiate between them.
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Synchronous dataflow architectures tune to match the workload presented by real-time data path applications such as wire speed packet forwarding. Dataflow architectures that are deterministic in nature enable programmers to manage complex tasks such as processor
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Programs are loaded into the CAM of a dynamic dataflow computer. When all of the tagged operands of an instruction become available (that is, output from previous instructions and/or user input), the instruction is marked as ready for execution by an
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A dataflow compiler records these dependencies by creating unique tags for each dependency instead of using variable names. By giving each dependency a unique tag, it allows the non-dependent code segments in the binary to be executed
144:, in concept: the executability and execution of instructions is solely determined based on the availability of input arguments to the instructions, so that the order of instruction execution may be hard to predict.
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to a small number of execution units (2-6) and limits the execution window sizes to the range of 32 to 200 instructions, much smaller than envisioned for full dataflow machines.
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Although no commercially successful general-purpose computer hardware has used a dataflow architecture, it has been successfully implemented in specialized hardware such as in
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pioneered the field of static dataflow architectures while the
Manchester Dataflow Machine and MIT Tagged Token architecture were major projects in dynamic dataflow.
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Dataflow networks deliver the instruction tokens to the execution units and return the data tokens to the CAM. In contrast to the conventional
249:(OOE) has become the dominant computing paradigm since the 1990s. It is a form of restricted dataflow. This paradigm introduced the idea of an
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An instruction, along with its required data operands, is transmitted to an execution unit as a packet, also called an
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and in parallel. Compiler detects the loops, break statements and various programming control syntax for data flow.
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Maxfield, Max (24 December 2020). "Say Hello to Deep Vision's
Polymorphic Dataflow Architecture".
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Cerebras
Architecture Deep Dive: First Look Inside the HW/SW Co-Design for Deep Learning
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Dataflow Research Project, Research Reports: Abstracts, September 1997
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171:). It is also very relevant in many software architectures today including
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Efficiently dispatching instruction tokens in a massively parallel system.
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Efficiently broadcasting data tokens in a massively parallel system.
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The research, however, never overcame the problems related to:
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dynamically keeping track of the data dependencies, restricts
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Meanwhile, there is a clash of terminology, since the term
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Hardware architectures for dataflow was a major topic in
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49:. Unsourced material may be challenged and removed.
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570:(Press release). June 18, 2008. Archived from
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140:architecture. Dataflow architectures have no
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1613:Computer performance by orders of magnitude
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109:Learn how and when to remove this message
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132:that directly contrasts the traditional
212:research in the 1970s and early 1980s.
16:Type of low-level computer architecture
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1584:Floating-point operations per second
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276:Static and dynamic dataflow machines
47:adding citations to reliable sources
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434:Veen, Arthur H. (December 1986).
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396:Transport triggered architecture
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2485:History of general-purpose CPUs
712:Nondeterministic Turing machine
496:"Kinara (formerly Deep Vision)"
436:"Dataflow Machine Architecture"
385:Binary Modular Dataflow Machine
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665:Deterministic finite automaton
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2122:Translation lookaside buffer
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717:Probabilistic Turing machine
544:Lie, Sean (29 August 2022).
271:Dataflow architecture topics
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363:von Neumann architecture
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165:artificial intelligence
58:"Dataflow architecture"
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2111:Memory management unit
1860:Secure cryptoprocessor
1854:Tensor Processing Unit
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1570:Cycles per instruction
1564:Instructions per cycle
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1202:Instruction pipelining
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247:out-of-order execution
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2864:Hardware acceleration
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2567:Hardware acceleration
2347:Sum-addressed decoder
2093:Arithmetic logic unit
1220:Classic RISC pipeline
1174:Epiphany architecture
1021:Motorola 68000 series
440:ACM Computing Surveys
210:computer architecture
130:computer architecture
122:Dataflow architecture
2869:Classes of computers
2696:High-level synthesis
2468:Performance per watt
2046:replacement policies
1712:Package on a package
1602:Performance per watt
1506:Pipelined processing
1276:Tomasulo's algorithm
1081:Clipper architecture
937:Application-specific
650:Finite-state machine
198:dataflow programming
43:improve this article
2821:Digital electronics
2773:In-memory computing
2753:Transport triggered
2500:Digital electronics
2153:Instruction decoder
2105:Floating-point unit
1759:Soft microprocessor
1706:System in a package
1281:Reservation station
811:Transport-triggered
452:10.1145/27633.28055
415:In-memory computing
175:engine designs and
157:graphics processing
2831:Hardware emulation
2799:Programmable logic
2588:Parallel computing
2372:Integrated circuit
2216:Processor register
1870:Baseband processor
1215:Operand forwarding
675:Cellular automaton
484:. Techfocus media.
375:Parallel computing
177:parallel computing
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1009:
1008:
1006:
1005:
1004:
1003:
993:
988:
983:
978:
973:
968:
963:
962:
961:
951:
950:
949:
939:
934:
929:
924:
918:
916:
909:
901:
900:
898:
897:
892:
887:
882:
877:
872:
871:
870:
865:
863:Virtual memory
855:
850:
849:
848:
843:
838:
833:
823:
818:
813:
808:
803:
802:
801:
791:
786:
780:
778:
772:
771:
769:
768:
767:
766:
761:
756:
751:
741:
736:
731:
730:
729:
724:
719:
714:
709:
704:
699:
694:
687:Turing machine
684:
683:
682:
677:
672:
667:
662:
657:
647:
642:
636:
634:
628:
627:
620:
619:
612:
605:
597:
589:
588:
577:
574:on 2011-07-22.
555:
536:
512:
487:
472:
446:(4): 365–396.
425:
424:
422:
419:
418:
417:
412:
411:
410:
398:
393:
391:Systolic array
388:
382:
377:
370:
367:
347:
344:
324:execution unit
318:
315:
293:
290:
277:
274:
272:
269:
239:
238:
231:
228:
205:
202:
185:load balancing
117:
116:
31:
29:
22:
15:
9:
6:
4:
3:
2:
2886:
2875:
2872:
2870:
2867:
2865:
2862:
2861:
2859:
2844:
2841:
2839:
2836:
2832:
2829:
2828:
2827:
2824:
2822:
2819:
2815:
2812:
2810:
2807:
2806:
2805:
2802:
2800:
2797:
2796:
2794:
2790:
2784:
2781:
2779:
2776:
2774:
2771:
2769:
2768:Heterogeneous
2766:
2764:
2761:
2759:
2756:
2754:
2751:
2749:
2746:
2745:
2743:
2741:
2740:Architectures
2737:
2729:
2726:
2725:
2724:
2721:
2719:
2716:
2714:
2711:
2709:
2706:
2702:
2699:
2698:
2697:
2694:
2693:
2691:
2687:
2681:
2678:
2676:
2673:
2669:
2666:
2665:
2664:
2661:
2659:
2656:
2652:
2649:
2648:
2647:
2644:
2642:
2639:
2637:
2634:
2632:
2629:
2627:
2624:
2620:
2617:
2615:
2612:
2611:
2610:
2607:
2606:
2604:
2600:
2594:
2591:
2589:
2586:
2584:
2581:
2580:
2578:
2576:
2572:
2568:
2561:
2556:
2554:
2549:
2547:
2542:
2541:
2538:
2526:
2523:
2521:
2518:
2516:
2513:
2511:
2508:
2506:
2503:
2501:
2498:
2496:
2493:
2491:
2488:
2486:
2483:
2482:
2480:
2476:
2469:
2466:
2464:
2461:
2459:
2456:
2454:
2451:
2449:
2446:
2444:
2441:
2439:
2436:
2435:
2433:
2431:
2425:
2415:
2412:
2410:
2407:
2405:
2402:
2400:
2397:
2395:
2392:
2388:
2385:
2383:
2380:
2378:
2375:
2374:
2373:
2370:
2369:
2367:
2365:
2361:
2355:
2352:
2348:
2345:
2343:
2340:
2339:
2338:
2335:
2331:
2328:
2327:
2326:
2323:
2321:
2318:
2316:
2315:Demultiplexer
2313:
2311:
2308:
2307:
2305:
2303:
2299:
2293:
2290:
2288:
2285:
2282:
2280:
2277:
2275:
2272:
2270:
2267:
2265:
2262:
2261:
2259:
2257:
2253:
2247:
2244:
2242:
2239:
2237:
2236:Memory buffer
2234:
2232:
2231:Register file
2229:
2227:
2224:
2222:
2219:
2217:
2214:
2213:
2211:
2209:
2205:
2197:
2194:
2192:
2189:
2188:
2187:
2184:
2182:
2179:
2177:
2174:
2172:
2171:Combinational
2169:
2168:
2166:
2164:
2160:
2154:
2151:
2147:
2144:
2143:
2141:
2138:
2136:
2133:
2131:
2128:
2123:
2120:
2118:
2115:
2114:
2112:
2109:
2106:
2103:
2100:
2097:
2094:
2091:
2090:
2088:
2086:
2080:
2074:
2071:
2069:
2066:
2064:
2061:
2059:
2056:
2052:
2049:
2047:
2044:
2042:
2039:
2037:
2034:
2032:
2029:
2027:
2024:
2023:
2022:
2019:
2017:
2014:
2013:
2011:
2007:
2001:
1998:
1996:
1993:
1991:
1988:
1986:
1983:
1982:
1980:
1976:
1968:
1965:
1964:
1963:
1960:
1958:
1955:
1953:
1950:
1948:
1945:
1943:
1940:
1938:
1935:
1933:
1930:
1928:
1925:
1923:
1920:
1918:
1915:
1913:
1910:
1908:
1905:
1903:
1900:
1898:
1895:
1893:
1890:
1889:
1887:
1885:
1881:
1871:
1868:
1866:
1863:
1861:
1858:
1855:
1852:
1849:
1846:
1843:
1840:
1837:
1834:
1832:
1829:
1826:
1823:
1821:
1818:
1816:
1813:
1812:
1810:
1808:
1802:
1795:
1792:
1790:
1787:
1784:
1781:
1778:
1775:
1774:
1772:
1766:
1760:
1757:
1755:
1752:
1750:
1747:
1745:
1742:
1740:
1737:
1735:
1732:
1730:
1727:
1726:
1724:
1720:
1713:
1710:
1707:
1704:
1701:
1698:
1696:
1693:
1691:
1688:
1686:
1683:
1681:
1678:
1676:
1673:
1671:
1668:
1666:
1663:
1661:
1658:
1656:
1653:
1651:
1648:
1644:
1641:
1640:
1638:
1635:
1632:
1629:
1628:
1626:
1624:
1620:
1614:
1611:
1609:
1606:
1603:
1600:
1597:
1594:
1591:
1588:
1585:
1582:
1579:
1576:
1571:
1568:
1567:
1565:
1562:
1560:
1557:
1556:
1554:
1552:
1546:
1534:
1531:
1530:
1529:
1526:
1524:
1521:
1517:
1514:
1512:
1509:
1507:
1504:
1502:
1499:
1498:
1497:
1494:
1492:
1489:
1488:
1486:
1484:
1480:
1474:
1471:
1469:
1466:
1464:
1461:
1457:
1454:
1452:
1449:
1448:
1447:
1444:
1442:
1439:
1438:
1436:
1434:
1430:
1424:
1421:
1419:
1416:
1412:
1409:
1408:
1407:
1404:
1400:
1397:
1395:
1392:
1391:
1390:
1387:
1383:
1380:
1378:
1375:
1374:
1373:
1370:
1368:
1365:
1361:
1358:
1356:
1353:
1352:
1351:
1348:
1347:
1345:
1341:
1338:
1336:
1332:
1322:
1319:
1317:
1314:
1313:
1311:
1309:
1305:
1299:
1296:
1294:
1291:
1287:
1284:
1282:
1279:
1278:
1277:
1274:
1272:
1271:Scoreboarding
1269:
1268:
1266:
1264:
1260:
1254:
1253:False sharing
1251:
1249:
1246:
1244:
1241:
1239:
1236:
1235:
1233:
1231:
1227:
1221:
1218:
1216:
1213:
1211:
1208:
1207:
1205:
1203:
1199:
1196:
1194:
1190:
1180:
1177:
1175:
1172:
1170:
1167:
1164:
1160:
1157:
1155:
1152:
1150:
1147:
1145:
1142:
1141:
1139:
1137:
1134:
1132:
1129:
1127:
1124:
1122:
1119:
1117:
1114:
1112:
1109:
1107:
1104:
1102:
1099:
1097:
1094:
1092:
1089:
1087:
1084:
1082:
1079:
1075:
1072:
1070:
1067:
1065:
1062:
1061:
1059:
1057:
1054:
1052:
1049:
1047:
1046:Stanford MIPS
1044:
1042:
1039:
1037:
1034:
1032:
1029:
1027:
1024:
1022:
1019:
1018:
1016:
1010:
1002:
999:
998:
997:
994:
992:
989:
987:
984:
982:
979:
977:
974:
972:
969:
967:
964:
960:
957:
956:
955:
952:
948:
945:
944:
943:
940:
938:
935:
933:
930:
928:
925:
923:
920:
919:
917:
913:
910:
908:
907:architectures
902:
896:
893:
891:
888:
886:
883:
881:
878:
876:
875:Heterogeneous
873:
869:
866:
864:
861:
860:
859:
856:
854:
851:
847:
844:
842:
839:
837:
834:
832:
829:
828:
827:
826:Memory access
824:
822:
819:
817:
814:
812:
809:
807:
804:
800:
797:
796:
795:
792:
790:
787:
785:
782:
781:
779:
777:
773:
765:
762:
760:
759:Random-access
757:
755:
752:
750:
747:
746:
745:
742:
740:
739:Stack machine
737:
735:
732:
728:
725:
723:
720:
718:
715:
713:
710:
708:
705:
703:
700:
698:
695:
693:
690:
689:
688:
685:
681:
678:
676:
673:
671:
668:
666:
663:
661:
658:
656:
655:with datapath
653:
652:
651:
648:
646:
643:
641:
638:
637:
635:
633:
629:
625:
618:
613:
611:
606:
604:
599:
598:
595:
586:
581:
573:
569:
565:
559:
551:
547:
540:
526:
522:
516:
501:
497:
491:
483:
476:
461:
457:
453:
449:
445:
441:
437:
430:
426:
416:
413:
408:
405:
404:
402:
399:
397:
394:
392:
389:
386:
383:
381:
378:
376:
373:
372:
366:
364:
359:
357:
353:
343:
341:
336:
332:
327:
325:
314:
312:
306:
303:
299:
289:
287:
282:
268:
266:
263:
262:
256:
252:
248:
245:Nonetheless,
243:
236:
232:
229:
226:
225:
224:
221:
219:
215:
211:
201:
199:
195:
194:
188:
186:
180:
178:
174:
170:
166:
162:
158:
154:
150:
145:
143:
139:
135:
131:
127:
123:
113:
110:
102:
91:
88:
84:
81:
77:
74:
70:
67:
63:
60: –
59:
55:
54:Find sources:
48:
44:
38:
37:
32:This article
30:
26:
21:
20:
2783:Neuromorphic
2747:
2646:Cryptography
2602:Applications
2525:Chip carrier
2463:Clock gating
2382:Mixed-signal
2279:Write buffer
2256:Control unit
2068:Clock signal
1807:accelerators
1789:Cypress PSoC
1446:Simultaneous
1263:Out-of-order
895:Neuromorphic
805:
776:Architecture
734:Belt machine
727:Zeno machine
660:Hierarchical
580:
572:the original
567:
558:
549:
539:
528:. Retrieved
524:
515:
504:. Retrieved
499:
490:
481:
475:
463:. Retrieved
443:
439:
429:
360:
355:
351:
349:
346:Instructions
334:
330:
328:
320:
311:out of order
310:
307:
295:
283:
279:
260:
254:
250:
244:
240:
222:
207:
191:
189:
181:
179:frameworks.
146:
138:control flow
121:
120:
105:
96:
86:
79:
72:
65:
53:
41:Please help
36:verification
33:
2310:Multiplexer
2274:Data buffer
1985:Single-core
1957:bit slicing
1815:Coprocessor
1670:Coprocessor
1551:performance
1473:Cooperative
1463:Speculative
1423:Distributed
1382:Superscalar
1367:Instruction
1335:Parallelism
1308:Speculative
1140:System/3x0
1012:Instruction
789:Von Neumann
702:Post–Turing
302:source code
214:Jack Dennis
99:August 2012
2858:Categories
2814:chronology
2675:Networking
2430:management
2325:Multiplier
2186:Logic gate
2176:Sequential
2083:Functional
2063:Clock rate
2036:Data cache
2009:Components
1990:Multi-core
1978:Core count
1468:Preemptive
1372:Pipelining
1355:Bit-serial
1298:Wide-issue
1243:Structural
1165:Tilera ISA
1131:MicroBlaze
1101:ETRAX CRIS
996:Comparison
841:Load–store
821:Endianness
530:2022-12-11
506:2022-12-11
421:References
356:data token
331:activating
169:scheduling
69:newspapers
2804:Processor
2758:Multicore
2364:Circuitry
2284:Microcode
2208:Registers
2051:coherence
2026:CPU cache
1884:Word size
1549:Processor
1193:Execution
1096:DEC Alpha
1074:Power ISA
890:Cognitive
697:Universal
568:EN-Genius
552:(Report).
298:compilers
233:Building
161:telemetry
2763:Manycore
2748:Dataflow
2701:C to HDL
2302:Datapath
1995:Manycore
1967:variable
1805:Hardware
1441:Temporal
1121:OpenRISC
816:Cellular
806:Dataflow
799:modified
550:Cerebras
369:See also
317:Programs
292:Compiler
193:dataflow
173:database
126:dataflow
2792:Related
2619:DirectX
2478:Related
2409:Quantum
2399:Digital
2394:Boolean
2292:Counter
2191:Quantum
1952:512-bit
1947:256-bit
1942:128-bit
1785:(MPSoC)
1770:on chip
1768:Systems
1586:(FLOPS)
1399:Process
1248:Control
1230:Hazards
1116:Itanium
1111:Unicore
1069:PowerPC
794:Harvard
754:Pointer
749:Counter
707:Quantum
521:"Hailo"
465:5 March
460:5467025
387:(BMDFM)
204:History
128:-based
83:scholar
2809:design
2668:scrypt
2575:Theory
2414:Switch
2404:Analog
2142:(IMC)
2113:(MMU)
1962:others
1937:64-bit
1932:48-bit
1927:32-bit
1922:24-bit
1917:16-bit
1912:15-bit
1907:12-bit
1744:Mobile
1660:Stream
1655:Barrel
1650:Vector
1639:(GPU)
1598:(SUPS)
1566:(IPC)
1418:Memory
1411:Vector
1394:Thread
1377:Scalar
1179:Others
1126:RISC-V
1091:SuperH
1060:Power
1056:MIPS-X
1031:PDP-11
880:Fabric
632:Models
502:. 2022
500:Kinara
458:
403:(NoC)
335:firing
253:. The
85:
78:
71:
64:
56:
2626:Audio
2614:GPGPU
2470:(PPW)
2428:Power
2320:Adder
2196:Array
2163:Logic
2124:(TLB)
2107:(FPU)
2101:(AGU)
2095:(ALU)
2085:units
2021:Cache
1902:8-bit
1897:4-bit
1892:1-bit
1856:(TPU)
1850:(DSP)
1844:(PPU)
1838:(VPU)
1827:(GPU)
1796:(NoC)
1779:(SoC)
1714:(PoP)
1708:(SiP)
1702:(MCM)
1643:GPGPU
1633:(CPU)
1623:Types
1604:(PPW)
1592:(TPS)
1580:(IPS)
1572:(CPI)
1343:Level
1154:S/390
1149:S/370
1144:S/360
1086:SPARC
1064:POWER
947:TRIPS
915:Types
525:Hailo
456:S2CID
409:(SoC)
380:SISAL
124:is a
90:JSTOR
76:books
2718:CPLD
2713:ASIC
2708:FPGA
2680:Data
2448:ACPI
2181:Glue
2073:FIFO
2016:Core
1754:ASIP
1695:CPLD
1690:FPOA
1685:FPGA
1680:ASIC
1533:SPMD
1528:MIMD
1523:MISD
1516:SWAR
1496:SIMD
1491:SISD
1406:Data
1389:Task
1360:Word
1106:M32R
1051:MIPS
1014:sets
981:ZISC
976:NISC
971:OISC
966:MISC
959:EPIC
954:VLIW
942:EDGE
932:RISC
927:CISC
836:HUMA
831:NUMA
467:2019
265:CPUs
62:news
2651:TLS
2609:GPU
2443:APM
2438:PMU
2330:CPU
2287:ROM
2058:Bus
1675:PAL
1350:Bit
1136:LMC
1041:ARM
1036:x86
1026:VAX
448:doi
333:or
326:.
261:OOE
218:MIT
216:of
200:.
136:or
45:by
2860::
2377:3D
566:.
548:.
523:.
498:.
454:.
444:18
442:.
438:.
159:,
155:,
151:,
2559:e
2552:t
2545:v
616:e
609:t
602:v
533:.
509:.
469:.
450::
112:)
106:(
101:)
97:(
87:·
80:·
73:·
66:·
39:.
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
